From patchwork Tue Dec 8 06:10:32 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: DJ Delorie X-Patchwork-Id: 553808 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 34F39140082 for ; Tue, 8 Dec 2015 17:10:45 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=a7ahh/5D; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :message-id:from:to:subject; q=dns; s=default; b=SSrPzvJgMFbT/CC kXRRwvD73TOl29omx65zMu4WKR5CvFM3Yi6u0+WcAeLwyd2WpC+VdgeGm1eIom8u vdnb2qIv5/IT+jkrLT/l22ugnmZqm8IVOLRxLfWssAfUpQAF57/5eX+HF77UTjF3 k0Ix7tjrBOYZIUgqB3oXpTh89Bis= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :message-id:from:to:subject; s=default; bh=TgU/XZKl1iHF5Tf1yvAN9 c2CctY=; b=a7ahh/5DCWpcwyvtu9D3PKGHdjKb3iWrg4avXej/s4ZPXiF8kYpbB 8SN2Hymjbdax4J5kmgxS5gRvHAZY/wUX8NlGJJMtRxoHWC9m9GR9nXCQepnnzUdc iqyHWti8mqqZW+FgMP0Ct+VvdBtOUJi8qKRR2+oMKt1eoiC8bE8byw= Received: (qmail 49217 invoked by alias); 8 Dec 2015 06:10:38 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 49199 invoked by uid 89); 8 Dec 2015 06:10:37 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL, BAYES_40, KAM_ASCII_DIVIDERS, SPF_HELO_PASS, T_RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Tue, 08 Dec 2015 06:10:35 +0000 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (Postfix) with ESMTPS id 4D472368E3 for ; Tue, 8 Dec 2015 06:10:34 +0000 (UTC) Received: from greed.delorie.com ([10.3.113.2]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id tB86AXvY018804 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO) for ; Tue, 8 Dec 2015 01:10:34 -0500 Received: from greed.delorie.com (greed.delorie.com [127.0.0.1]) by greed.delorie.com (8.14.4/8.14.4) with ESMTP id tB86AWjA028663 for ; Tue, 8 Dec 2015 01:10:32 -0500 Received: (from dj@localhost) by greed.delorie.com (8.14.4/8.14.4/Submit) id tB86AWfG028661; Tue, 8 Dec 2015 01:10:32 -0500 Date: Tue, 8 Dec 2015 01:10:32 -0500 Message-Id: <201512080610.tB86AWfG028661@greed.delorie.com> From: DJ Delorie To: gcc-patches@gcc.gnu.org Subject: [rl78] fix far addressing etc X-IsSubscribed: yes Various fixes for far memory addressing (and large programs in general). Committed. * config/rl78/constraints.md (Wfr): Change to be a non-memory constraint. * config/rl78/rl78-protos.h (rl78_one_far_p): Declare. * config/rl78/rl78.c (rl78_one_far_p): Define. * config/rl78/rl78-virt (movqi_virt): Fix far memory alternatives. (movhi_virt): Likewise. (zero_extendqihi2_virt): Likewise. (extendqihi2_virt): Likewise. (add3_virt): Likewise. (sub3_virt): Likewise. (andqi3_virt): Likewise. (iorqi3_virt): Likewise. (xorqi3_virt): Likewise. * config/rl78/rl78-real.md (bf,br): Use long forms to avoid reloc overflow in large files. Index: gcc/config/rl78/constraints.md =================================================================== --- gcc/config/rl78/constraints.md (revision 231385) +++ gcc/config/rl78/constraints.md (working copy) @@ -361,13 +361,13 @@ (define_memory_constraint "Ws1" "es:word8[SP]" (match_test "(rl78_es_addr (op) && satisfies_constraint_Cs1 (rl78_es_base (op))) || satisfies_constraint_Cs1 (op)") ) -(define_memory_constraint "Wfr" +(define_constraint "Wfr" "ES/CS far pointer" (and (match_code "mem") (match_test "rl78_far_p (op)")) ) (define_memory_constraint "Wsa" Index: gcc/config/rl78/rl78-protos.h =================================================================== --- gcc/config/rl78/rl78-protos.h (revision 231385) +++ gcc/config/rl78/rl78-protos.h (working copy) @@ -51,6 +51,8 @@ bool rl78_flags_already_set (rtx, rtx); void rl78_output_symbol_ref (FILE *, rtx); void rl78_output_labelref (FILE *, const char *); int rl78_saddr_p (rtx x); int rl78_sfr_p (rtx x); void rl78_output_aligned_common (FILE *, tree, const char *, int, int, int); + +int rl78_one_far_p (rtx *operands, int num_operands); Index: gcc/config/rl78/rl78-real.md =================================================================== --- gcc/config/rl78/rl78-real.md (revision 231385) +++ gcc/config/rl78/rl78-real.md (working copy) @@ -586,25 +586,25 @@ (if_then_else (eq (and (reg:QI A_REG) (match_operand 0 "immediate_operand" "n")) (const_int 0)) (label_ref (match_operand 1 "" "")) (pc)))] "" - "bf\tA.%B0, $%1" + "bt\tA.%B0, $1f\n\tbr !!%1\n\t1:" [(set (attr "update_Z") (const_string "clobber"))] ) (define_insn "bt" [(set (pc) (if_then_else (ne (and (reg:QI A_REG) (match_operand 0 "immediate_operand" "n")) (const_int 0)) (label_ref (match_operand 1 "" "")) (pc)))] "" - "bt\tA.%B0, $%1" + "bf\tA.%B0, $1f\n\tbr !!%1\n\t1:" [(set (attr "update_Z") (const_string "clobber"))] ) ;; NOTE: These peepholes are fragile. They rely upon GCC generating ;; a specific sequence on insns, based upon examination of test code. ;; Improvements to GCC or using code other than the test code can result Index: gcc/config/rl78/rl78-virt.md =================================================================== --- gcc/config/rl78/rl78-virt.md (revision 231385) +++ gcc/config/rl78/rl78-virt.md (working copy) @@ -39,14 +39,14 @@ "rl78_virt_insns_ok ()" "v.mov %0, %1" [(set_attr "valloc" "op1")] ) (define_insn "*movqi_virt" - [(set (match_operand:QI 0 "nonimmediate_operand" "=vY,v,Wfr") - (match_operand 1 "general_operand" "vInt8J,YWfr,vInt8J"))] + [(set (match_operand:QI 0 "nonimmediate_operand" "=vY,v,*Wfr,Y,*Wfr,*Wfr") + (match_operand 1 "general_operand" "vInt8JY,*Wfr,vInt8J,*Wfr,Y,*Wfr"))] "rl78_virt_insns_ok ()" "v.mov %0, %1" [(set_attr "valloc" "op1")] ) (define_insn "*movhi_virt_mm" @@ -55,33 +55,33 @@ "rl78_virt_insns_ok ()" "v.movw %0, %1" [(set_attr "valloc" "op1")] ) (define_insn "*movhi_virt" - [(set (match_operand:HI 0 "nonimmediate_operand" "=vS, Y, v, Wfr") - (match_operand:HI 1 "general_operand" "viYS, viS, Wfr, vi"))] + [(set (match_operand:HI 0 "nonimmediate_operand" "=vS, Y, v, *Wfr") + (match_operand:HI 1 "general_operand" "viYS, viS, *Wfr, vi"))] "rl78_virt_insns_ok ()" "v.movw %0, %1" [(set_attr "valloc" "op1")] ) ;;---------- Conversions ------------------------ (define_insn "*zero_extendqihi2_virt" - [(set (match_operand:HI 0 "rl78_nonfar_nonimm_operand" "=vm") - (zero_extend:HI (match_operand:QI 1 "general_operand" "vim")))] - "rl78_virt_insns_ok ()" + [(set (match_operand:HI 0 "rl78_nonfar_nonimm_operand" "=vY,*Wfr") + (zero_extend:HI (match_operand:QI 1 "general_operand" "vim,viY")))] + "rl78_virt_insns_ok () && rl78_one_far_p (operands, 2)" "v.zero_extend\t%0, %1" [(set_attr "valloc" "op1")] ) (define_insn "*extendqihi2_virt" - [(set (match_operand:HI 0 "rl78_nonfar_nonimm_operand" "=vm") - (sign_extend:HI (match_operand:QI 1 "general_operand" "vim")))] - "rl78_virt_insns_ok ()" + [(set (match_operand:HI 0 "rl78_nonfar_nonimm_operand" "=vY,*Wfr") + (sign_extend:HI (match_operand:QI 1 "general_operand" "vim,viY")))] + "rl78_virt_insns_ok () && rl78_one_far_p (operands, 2)" "v.sign_extend\t%0, %1" [(set_attr "valloc" "op1")] ) ;;---------- Arithmetic ------------------------ @@ -92,26 +92,26 @@ ] "rl78_virt_insns_ok ()" "v.inc\t%0, %1, %2" ) (define_insn "*add3_virt" - [(set (match_operand:QHI 0 "rl78_nonfar_nonimm_operand" "=vY,S") - (plus:QHI (match_operand:QHI 1 "rl78_nonfar_operand" "viY,0") - (match_operand:QHI 2 "rl78_general_operand" "vim,i"))) + [(set (match_operand:QHI 0 "rl78_nonimmediate_operand" "=vY, S, *Wfr, vY") + (plus:QHI (match_operand:QHI 1 "rl78_general_operand" "%viY, 0, 0viY, *Wfr") + (match_operand:QHI 2 "rl78_general_operand" "vim, i, viY, viY"))) ] - "rl78_virt_insns_ok ()" + "rl78_virt_insns_ok () && rl78_one_far_p (operands, 3)" "v.add\t%0, %1, %2" ) (define_insn "*sub3_virt" - [(set (match_operand:QHI 0 "rl78_nonfar_nonimm_operand" "=vm,S") - (minus:QHI (match_operand:QHI 1 "rl78_nonfar_operand" "vim,0") - (match_operand:QHI 2 "rl78_general_operand" "vim,i"))) + [(set (match_operand:QHI 0 "rl78_nonimmediate_operand" "=vY, S, *Wfr, vY") + (minus:QHI (match_operand:QHI 1 "rl78_general_operand" "viY, 0, 0viY, *Wfr") + (match_operand:QHI 2 "rl78_general_operand" "vim, i, viY, viY"))) ] - "rl78_virt_insns_ok ()" + "rl78_virt_insns_ok () && rl78_one_far_p (operands, 3)" "v.sub\t%0, %1, %2" ) (define_insn "*umulhi3_shift_virt" [(set (match_operand:HI 0 "register_operand" "=v") (mult:HI (match_operand:HI 1 "rl78_nonfar_operand" "%vim") @@ -128,35 +128,35 @@ "rl78_virt_insns_ok () && !TARGET_G10" "v.mulu\t%0, %2" [(set_attr "valloc" "umul")] ) (define_insn "*andqi3_virt" - [(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=vm") - (and:QI (match_operand:QI 1 "rl78_general_operand" "vim") - (match_operand:QI 2 "rl78_general_operand" "vim"))) + [(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=vm, *Wfr, vY") + (and:QI (match_operand:QI 1 "rl78_general_operand" "%vim, 0viY, *Wfr") + (match_operand:QI 2 "rl78_general_operand" "vim, viY, viY"))) ] - "rl78_virt_insns_ok ()" + "rl78_virt_insns_ok () && rl78_one_far_p (operands, 3)" "v.and\t%0, %1, %2" ) (define_insn "*iorqi3_virt" - [(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=vm") - (ior:QI (match_operand:QI 1 "rl78_general_operand" "vim") - (match_operand:QI 2 "rl78_general_operand" "vim"))) + [(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=vm, *Wfr, vY") + (ior:QI (match_operand:QI 1 "rl78_general_operand" "%vim, 0viY, *Wfr") + (match_operand:QI 2 "rl78_general_operand" "vim, viY, viY"))) ] - "rl78_virt_insns_ok ()" + "rl78_virt_insns_ok () && rl78_one_far_p (operands, 3)" "v.or\t%0, %1, %2" ) (define_insn "*xorqi3_virt" - [(set (match_operand:QI 0 "rl78_nonfar_nonimm_operand" "=v,vm,m") - (xor:QI (match_operand:QI 1 "rl78_nonfar_operand" "%0,vm,vm") - (match_operand 2 "rl78_general_operand" "i,vm,vim"))) + [(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=vm, *Wfr, vY") + (xor:QI (match_operand:QI 1 "rl78_general_operand" "%vim, 0viY, *Wfr") + (match_operand 2 "rl78_general_operand" "vim, viY, viY"))) ] - "rl78_virt_insns_ok ()" + "rl78_virt_insns_ok () && rl78_one_far_p (operands, 3)" "v.xor\t%0, %1, %2" ) ;;---------- Shifts ------------------------ (define_insn "*ashl3_virt" Index: gcc/config/rl78/rl78.c =================================================================== --- gcc/config/rl78/rl78.c (revision 231385) +++ gcc/config/rl78/rl78.c (working copy) @@ -607,12 +607,30 @@ rl78_force_nonfar_3 (rtx *operands, rtx emit_insn (gen (operands[0], operands[1], operands[2])); if (temp_reg) emit_move_insn (temp_reg, operands[0]); return 1; } +int +rl78_one_far_p (rtx *operands, int n) +{ + rtx which = NULL; + int i, c = 0; + + for (i = 0; i < n; i ++) + if (rl78_far_p (operands[i])) + { + if (which == NULL) + which = operands[i]; + else if (rtx_equal_p (operands[i], which)) + continue; + c ++; + } + return c <= 1; +} + #undef TARGET_CAN_ELIMINATE #define TARGET_CAN_ELIMINATE rl78_can_eliminate static bool rl78_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to ATTRIBUTE_UNUSED) {