| Message ID | 1449545956-2772-27-git-send-email-sjg@chromium.org |
|---|---|
| State | Superseded |
| Delegated to: | Bin Meng |
| Headers | show |
Hi Simon, On Tue, Dec 8, 2015 at 11:38 AM, Simon Glass <sjg@chromium.org> wrote: > These devices currently need to be inited early in boot. Once we have the > init in the right places (with each device doing its own init and no > problems with ordering) we should be able to remove this. For now it is > needed to keep things working. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > arch/x86/cpu/cpu.c | 16 ++++++++++++++-- > 1 file changed, 14 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c > index 3cbed17..35fa046 100644 > --- a/arch/x86/cpu/cpu.c > +++ b/arch/x86/cpu/cpu.c > @@ -704,8 +704,20 @@ static int x86_init_cpus(void) > > int cpu_init_r(void) > { > - if (ll_boot_init()) > - return x86_init_cpus(); > + struct udevice *dev; > + int ret; > + > + if (!ll_boot_init()) > + return 0; > + > + ret = x86_init_cpus(); > + if (ret) > + return ret; > + > + /* Set up the northbridge, PCH and LPC if available */ > + uclass_first_device(UCLASS_NORTHBRIDGE, &dev); > + uclass_first_device(UCLASS_PCH, &dev); > + uclass_first_device(UCLASS_LPC, &dev); I don't get it. The NORTHBRIDGE, PCH, LPC are already inited in the pre-reolcation stage. This cpu_init_r() is pretty late, how do we ensure the init order here? > > return 0; > } > -- Regards, Bin
Hi Bin, On 13 December 2015 at 05:54, Bin Meng <bmeng.cn@gmail.com> wrote: > Hi Simon, > > On Tue, Dec 8, 2015 at 11:38 AM, Simon Glass <sjg@chromium.org> wrote: >> These devices currently need to be inited early in boot. Once we have the >> init in the right places (with each device doing its own init and no >> problems with ordering) we should be able to remove this. For now it is >> needed to keep things working. >> >> Signed-off-by: Simon Glass <sjg@chromium.org> >> --- >> >> arch/x86/cpu/cpu.c | 16 ++++++++++++++-- >> 1 file changed, 14 insertions(+), 2 deletions(-) >> >> diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c >> index 3cbed17..35fa046 100644 >> --- a/arch/x86/cpu/cpu.c >> +++ b/arch/x86/cpu/cpu.c >> @@ -704,8 +704,20 @@ static int x86_init_cpus(void) >> >> int cpu_init_r(void) >> { >> - if (ll_boot_init()) >> - return x86_init_cpus(); >> + struct udevice *dev; >> + int ret; >> + >> + if (!ll_boot_init()) >> + return 0; >> + >> + ret = x86_init_cpus(); >> + if (ret) >> + return ret; >> + >> + /* Set up the northbridge, PCH and LPC if available */ >> + uclass_first_device(UCLASS_NORTHBRIDGE, &dev); >> + uclass_first_device(UCLASS_PCH, &dev); >> + uclass_first_device(UCLASS_LPC, &dev); > > I don't get it. The NORTHBRIDGE, PCH, LPC are already inited in the > pre-reolcation stage. This cpu_init_r() is pretty late, how do we > ensure the init order here? Driver model is restarted after relocation, so we end up probing these devices again. Some of them do different in before relocation and after. Regards, Simon
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index 3cbed17..35fa046 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -704,8 +704,20 @@ static int x86_init_cpus(void) int cpu_init_r(void) { - if (ll_boot_init()) - return x86_init_cpus(); + struct udevice *dev; + int ret; + + if (!ll_boot_init()) + return 0; + + ret = x86_init_cpus(); + if (ret) + return ret; + + /* Set up the northbridge, PCH and LPC if available */ + uclass_first_device(UCLASS_NORTHBRIDGE, &dev); + uclass_first_device(UCLASS_PCH, &dev); + uclass_first_device(UCLASS_LPC, &dev); return 0; }
These devices currently need to be inited early in boot. Once we have the init in the right places (with each device doing its own init and no problems with ordering) we should be able to remove this. For now it is needed to keep things working. Signed-off-by: Simon Glass <sjg@chromium.org> --- arch/x86/cpu/cpu.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-)