diff mbox

[1/1] Add ARM11 MPCore CPU target support

Message ID BLU437-SMTP123CD239C2AFC2F2A7D66EC1020@phx.gbl
State Accepted
Commit 449d7b9127096cf0a40118b298bc2fbbdac99d2a
Headers show

Commit Message

Sergi Granell Nov. 28, 2015, 2:55 p.m. UTC
gcc differentiates the mpcore-with-vfp from the mcpore-without-vfp
CPUs. The former is named just 'mpcore', while the latter is named
'mpcorenovfp'.

We only add one entry, 'mpcore' and let the user select whether or
not to use the VFP. We then name the CPU according to the user's
selection.

Signed-off-by: Sergi Granell <xerpi.g.12@gmail.com>
---
 arch/Config.in.arm | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Yann E. MORIN Dec. 27, 2015, 7:58 p.m. UTC | #1
Sergi, All,

On 2015-11-28 15:55 +0100, Sergi Granell spake thusly:
> gcc differentiates the mpcore-with-vfp from the mcpore-without-vfp
> CPUs. The former is named just 'mpcore', while the latter is named
> 'mpcorenovfp'.
> 
> We only add one entry, 'mpcore' and let the user select whether or
> not to use the VFP. We then name the CPU according to the user's
> selection.
> 
> Signed-off-by: Sergi Granell <xerpi.g.12@gmail.com>

Tested-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
[yann.morin.1998@free.fr: build-tested only]
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>

Regards,
Yann E. MORIN.

> ---
>  arch/Config.in.arm | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/Config.in.arm b/arch/Config.in.arm
> index 67ff384..1bf1fe2 100644
> --- a/arch/Config.in.arm
> +++ b/arch/Config.in.arm
> @@ -104,6 +104,13 @@ config BR2_arm1176jzf_s
>  	select BR2_ARM_CPU_HAS_THUMB
>  	select BR2_ARM_CPU_ARMV6
>  	select BR2_ARCH_HAS_MMU_OPTIONAL
> +config BR2_arm11mpcore
> +	bool "mpcore"
> +	select BR2_ARM_CPU_HAS_ARM
> +	select BR2_ARM_CPU_MAYBE_HAS_VFPV2
> +	select BR2_ARM_CPU_HAS_THUMB
> +	select BR2_ARM_CPU_ARMV6
> +	select BR2_ARCH_HAS_MMU_OPTIONAL
>  config BR2_cortex_a5
>  	bool "cortex-A5"
>  	select BR2_ARM_CPU_HAS_ARM
> @@ -419,6 +426,8 @@ config BR2_GCC_TARGET_CPU
>  	default "arm1136jf-s"	if BR2_arm1136jf_s
>  	default "arm1176jz-s"	if BR2_arm1176jz_s
>  	default "arm1176jzf-s"	if BR2_arm1176jzf_s
> +	default "mpcore"	if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
> +	default "mpcorenovfp"	if BR2_arm11mpcore
>  	default "cortex-a5"	if BR2_cortex_a5
>  	default "cortex-a7"	if BR2_cortex_a7
>  	default "cortex-a8"	if BR2_cortex_a8
> -- 
> 2.6.2
> 
> _______________________________________________
> buildroot mailing list
> buildroot@busybox.net
> http://lists.busybox.net/mailman/listinfo/buildroot
Peter Korsgaard Jan. 3, 2016, 9:39 p.m. UTC | #2
>>>>> "Yann" == Yann E MORIN <yann.morin.1998@free.fr> writes:

 > Sergi, All,
 > On 2015-11-28 15:55 +0100, Sergi Granell spake thusly:
 >> gcc differentiates the mpcore-with-vfp from the mcpore-without-vfp
 >> CPUs. The former is named just 'mpcore', while the latter is named
 >> 'mpcorenovfp'.
 >> 
 >> We only add one entry, 'mpcore' and let the user select whether or
 >> not to use the VFP. We then name the CPU according to the user's
 >> selection.
 >> 
 >> Signed-off-by: Sergi Granell <xerpi.g.12@gmail.com>

 > Tested-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
 > [yann.morin.1998@free.fr: build-tested only]
 > Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>

Committed, thanks.
diff mbox

Patch

diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index 67ff384..1bf1fe2 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -104,6 +104,13 @@  config BR2_arm1176jzf_s
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_arm11mpcore
+	bool "mpcore"
+	select BR2_ARM_CPU_HAS_ARM
+	select BR2_ARM_CPU_MAYBE_HAS_VFPV2
+	select BR2_ARM_CPU_HAS_THUMB
+	select BR2_ARM_CPU_ARMV6
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a5
 	bool "cortex-A5"
 	select BR2_ARM_CPU_HAS_ARM
@@ -419,6 +426,8 @@  config BR2_GCC_TARGET_CPU
 	default "arm1136jf-s"	if BR2_arm1136jf_s
 	default "arm1176jz-s"	if BR2_arm1176jz_s
 	default "arm1176jzf-s"	if BR2_arm1176jzf_s
+	default "mpcore"	if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
+	default "mpcorenovfp"	if BR2_arm11mpcore
 	default "cortex-a5"	if BR2_cortex_a5
 	default "cortex-a7"	if BR2_cortex_a7
 	default "cortex-a8"	if BR2_cortex_a8