From patchwork Sat Jun 5 21:31:09 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Blue Swirl X-Patchwork-Id: 54783 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E1A78B7D1B for ; Sun, 6 Jun 2010 07:33:09 +1000 (EST) Received: from localhost ([127.0.0.1]:50732 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OL0zK-00029K-7e for incoming@patchwork.ozlabs.org; Sat, 05 Jun 2010 17:33:06 -0400 Received: from [140.186.70.92] (port=44241 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OL0xn-00027r-Ju for qemu-devel@nongnu.org; Sat, 05 Jun 2010 17:31:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OL0xm-0005m4-HX for qemu-devel@nongnu.org; Sat, 05 Jun 2010 17:31:31 -0400 Received: from mail-pz0-f199.google.com ([209.85.222.199]:50851) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OL0xm-0005ly-9u for qemu-devel@nongnu.org; Sat, 05 Jun 2010 17:31:30 -0400 Received: by pzk37 with SMTP id 37so841033pzk.27 for ; Sat, 05 Jun 2010 14:31:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:mime-version:received:from:date :message-id:subject:to:content-type; bh=YXpt5U+WYApIfzUgiwAqvQwOXzUTN3aEUebIBOrDSEs=; b=mpQIuLB6xCVFnFb1wmbM3jI87Tuor0MdMBByc/ufPutY+u3r41ZJvEXP8Ya22Kp9Nc 0tnxlBMwnVPGzZi2r174hvx5qP6nBDRzveuP3JDGpSWCZwCwrF63ripMiTpXxGcl4C1L SA8LxFEopx359rhwGBWcFjXo1Nb7AK7hyru8g= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:from:date:message-id:subject:to:content-type; b=VN3YniASeMSb58tgsPdArjKLqbQRlwR7iEJW1JL5eVOR+8jwikEh8Hs2NXiMtyrIG0 op7n4/c2c6JssWwIDx0DnWEoyuTnDl7dAA8CajDcGlXo1RabZMVmWBc8gFCxZhm3WiQz 3SnyMBErU7I9HrjsVVmypEIjBBA7yh4OR/BEU= Received: by 10.141.108.21 with SMTP id k21mr10340551rvm.170.1275773489256; Sat, 05 Jun 2010 14:31:29 -0700 (PDT) MIME-Version: 1.0 Received: by 10.141.44.12 with HTTP; Sat, 5 Jun 2010 14:31:09 -0700 (PDT) From: Blue Swirl Date: Sat, 5 Jun 2010 21:31:09 +0000 Message-ID: To: qemu-devel X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Subject: [Qemu-devel] [PATCH 4/6] apic: avoid passing CPUState from devices X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Pass only APICState from pc.c. Signed-off-by: Blue Swirl --- hw/apic.c | 32 ++++++++++++++------------------ hw/apic.h | 7 ++++--- hw/pc.c | 10 ++++++---- 3 files changed, 24 insertions(+), 25 deletions(-) } else { diff --git a/hw/apic.c b/hw/apic.c index 7fbd79b..c4dc52c 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -94,7 +94,7 @@ #define MSI_ADDR_BASE 0xfee00000 #define MSI_ADDR_SIZE 0x100000 -typedef struct APICState { +struct APICState { CPUState *cpu_env; uint32_t apicbase; uint8_t id; @@ -118,7 +118,7 @@ typedef struct APICState { QEMUTimer *timer; int sipi_vector; int wait_for_sipi; -} APICState; +}; static int apic_io_memory; static APICState *local_apics[MAX_APICS + 1]; @@ -167,9 +167,8 @@ static inline int get_bit(uint32_t *tab, int index) return !!(tab[i] & mask); } -static void apic_local_deliver(CPUState *env, int vector) +static void apic_local_deliver(APICState *s, int vector) { - APICState *s = env->apic_state; uint32_t lvt = s->lvt[vector]; int trigger_mode; @@ -180,15 +179,15 @@ static void apic_local_deliver(CPUState *env, int vector) switch ((lvt >> 8) & 7) { case APIC_DM_SMI: - cpu_interrupt(env, CPU_INTERRUPT_SMI); + cpu_interrupt(s->cpu_env, CPU_INTERRUPT_SMI); break; case APIC_DM_NMI: - cpu_interrupt(env, CPU_INTERRUPT_NMI); + cpu_interrupt(s->cpu_env, CPU_INTERRUPT_NMI); break; case APIC_DM_EXTINT: - cpu_interrupt(env, CPU_INTERRUPT_HARD); + cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); break; case APIC_DM_FIXED: @@ -200,12 +199,11 @@ static void apic_local_deliver(CPUState *env, int vector) } } -void apic_deliver_pic_intr(CPUState *env, int level) +void apic_deliver_pic_intr(APICState *s, int level) { - if (level) - apic_local_deliver(env, APIC_LVT_LINT0); - else { - APICState *s = env->apic_state; + if (level) { + apic_local_deliver(s, APIC_LVT_LINT0); + } else { uint32_t lvt = s->lvt[APIC_LVT_LINT0]; switch ((lvt >> 8) & 7) { @@ -215,7 +213,7 @@ void apic_deliver_pic_intr(CPUState *env, int level) reset_bit(s->irr, lvt & 0xff); /* fall through */ case APIC_DM_EXTINT: - cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); + cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); break; } } @@ -591,9 +589,8 @@ static void apic_deliver(APICState *s, uint8_t dest, uint8_t dest_mode, trigger_mode); } -int apic_get_interrupt(CPUState *env) +int apic_get_interrupt(APICState *s) { - APICState *s = env->apic_state; int intno; /* if the APIC is installed or enabled, we let the 8259 handle the @@ -615,9 +612,8 @@ int apic_get_interrupt(CPUState *env) return intno; } -int apic_accept_pic_intr(CPUState *env) +int apic_accept_pic_intr(APICState *s) { - APICState *s = env->apic_state; uint32_t lvt0; if (!s) @@ -679,7 +675,7 @@ static void apic_timer(void *opaque) { APICState *s = opaque; - apic_local_deliver(s->cpu_env, APIC_LVT_TIMER); + apic_local_deliver(s, APIC_LVT_TIMER); apic_timer_update(s, s->next_time); } diff --git a/hw/apic.h b/hw/apic.h index 419c733..7dc7c62 100644 --- a/hw/apic.h +++ b/hw/apic.h @@ -2,14 +2,15 @@ #define APIC_H /* apic.c */ +typedef struct APICState APICState; void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t polarity, uint8_t trigger_mode); int apic_init(CPUState *env); -int apic_accept_pic_intr(CPUState *env); -void apic_deliver_pic_intr(CPUState *env, int level); -int apic_get_interrupt(CPUState *env); +int apic_accept_pic_intr(APICState *s); +void apic_deliver_pic_intr(APICState *s, int level); +int apic_get_interrupt(APICState *s); void apic_reset_irq_delivered(void); int apic_get_irq_delivered(void); diff --git a/hw/pc.c b/hw/pc.c index 9b85c42..fe4ebbe 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -142,7 +142,7 @@ int cpu_get_pic_interrupt(CPUState *env) { int intno; - intno = apic_get_interrupt(env); + intno = apic_get_interrupt(env->apic_state); if (intno >= 0) { /* set irq request if a PIC irq is still pending */ /* XXX: improve that */ @@ -150,8 +150,9 @@ int cpu_get_pic_interrupt(CPUState *env) return intno; } /* read the irq from the PIC */ - if (!apic_accept_pic_intr(env)) + if (!apic_accept_pic_intr(env->apic_state)) { return -1; + } intno = pic_read_irq(isa_pic); return intno; @@ -164,8 +165,9 @@ static void pic_irq_request(void *opaque, int irq, int level) DPRINTF("pic_irqs: %s irq %d\n", level? "raise" : "lower", irq); if (env->apic_state) { while (env) { - if (apic_accept_pic_intr(env)) - apic_deliver_pic_intr(env, level); + if (apic_accept_pic_intr(env->apic_state)) { + apic_deliver_pic_intr(env->apic_state, level); + } env = env->next_cpu; }