From patchwork Fri Jun 4 19:14:37 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 54691 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 31A61B7D24 for ; Sat, 5 Jun 2010 05:56:21 +1000 (EST) Received: from localhost ([127.0.0.1]:60345 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OKd06-0008Nt-72 for incoming@patchwork.ozlabs.org; Fri, 04 Jun 2010 15:56:18 -0400 Received: from [140.186.70.92] (port=59148 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OKcOL-00068M-Is for qemu-devel@nongnu.org; Fri, 04 Jun 2010 15:17:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OKcOK-0002dH-Cg for qemu-devel@nongnu.org; Fri, 04 Jun 2010 15:17:17 -0400 Received: from are.twiddle.net ([75.149.56.221]:54815) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OKcOJ-0002cv-SX for qemu-devel@nongnu.org; Fri, 04 Jun 2010 15:17:16 -0400 Received: from anchor.twiddle.home (anchor.twiddle.home [172.31.0.4]) by are.twiddle.net (Postfix) with ESMTPS id 20D0910AC; Fri, 4 Jun 2010 12:17:14 -0700 (PDT) Received: from anchor.twiddle.home (anchor.twiddle.home [127.0.0.1]) by anchor.twiddle.home (8.14.4/8.14.4) with ESMTP id o54JHCtb007305; Fri, 4 Jun 2010 12:17:12 -0700 Received: (from rth@localhost) by anchor.twiddle.home (8.14.4/8.14.4/Submit) id o54JHBJr007304; Fri, 4 Jun 2010 12:17:11 -0700 From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 4 Jun 2010 12:14:37 -0700 Message-Id: <1275678883-7082-30-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.0.1 In-Reply-To: <1275678883-7082-1-git-send-email-rth@twiddle.net> References: <1275678883-7082-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: agraf@suse.de, aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 29/35] tcg-s390: Tidy user qemu_ld/st. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Create a tcg_prepare_user_ldst to prep the host address to be used to implement the guest memory operation. Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.c | 33 +++++++++++++++++++++------------ 1 files changed, 21 insertions(+), 12 deletions(-) diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c index b73515d..ef1f69e 100644 --- a/tcg/s390/tcg-target.c +++ b/tcg/s390/tcg-target.c @@ -1313,6 +1313,17 @@ static void tcg_finish_qemu_ldst(TCGContext* s, uint16_t *label2_ptr) *(label2_ptr + 1) = ((unsigned long)s->code_ptr - (unsigned long)label2_ptr) >> 1; } +#else +static void tcg_prepare_user_ldst(TCGContext *s, TCGReg *addr_reg, + TCGReg *index_reg, tcg_target_long *disp) +{ + *index_reg = TCG_REG_NONE; + *disp = 0; + if (TARGET_LONG_BITS == 32) { + tgen_ext32u(s, TCG_TMP0, *addr_reg); + *addr_reg = TCG_TMP0; + } +} #endif /* CONFIG_SOFTMMU */ /* load data with address translation (if applicable) @@ -1323,6 +1334,9 @@ static void tcg_out_qemu_ld(TCGContext* s, const TCGArg* args, int opc) #if defined(CONFIG_SOFTMMU) int mem_index; uint16_t *label2_ptr; +#else + TCGReg index_reg; + tcg_target_long disp; #endif data_reg = *args++; @@ -1338,12 +1352,8 @@ static void tcg_out_qemu_ld(TCGContext* s, const TCGArg* args, int opc) tcg_finish_qemu_ldst(s, label2_ptr); #else - if (TARGET_LONG_BITS == 32) { - tgen_ext32u(s, TCG_TMP0, addr_reg); - tcg_out_qemu_ld_direct(s, opc, data_reg, TCG_TMP0, TCG_REG_NONE, 0); - } else { - tcg_out_qemu_ld_direct(s, opc, data_reg, addr_reg, TCG_REG_NONE, 0); - } + tcg_prepare_user_ldst(s, &addr_reg, &index_reg, &disp); + tcg_out_qemu_ld_direct(s, opc, data_reg, addr_reg, index_reg, disp); #endif } @@ -1353,6 +1363,9 @@ static void tcg_out_qemu_st(TCGContext* s, const TCGArg* args, int opc) #if defined(CONFIG_SOFTMMU) int mem_index; uint16_t *label2_ptr; +#else + TCGReg index_reg; + tcg_target_long disp; #endif data_reg = *args++; @@ -1368,12 +1381,8 @@ static void tcg_out_qemu_st(TCGContext* s, const TCGArg* args, int opc) tcg_finish_qemu_ldst(s, label2_ptr); #else - if (TARGET_LONG_BITS == 32) { - tgen_ext32u(s, TCG_TMP0, addr_reg); - tcg_out_qemu_st_direct(s, opc, data_reg, TCG_TMP0, TCG_REG_NONE, 0); - } else { - tcg_out_qemu_st_direct(s, opc, data_reg, addr_reg, TCG_REG_NONE, 0); - } + tcg_prepare_user_ldst(s, &addr_reg, &index_reg, &disp); + tcg_out_qemu_st_direct(s, opc, data_reg, addr_reg, index_reg, disp); #endif }