| Message ID | 4C08E25E.8000200@ericsson.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Kumar Gala |
| Headers | show |
On 06/04/2010 06:24 AM, kerstin jonsson wrote: > Hi, > > I'm using: > > git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git > > and building for ARCH=powerpc - mpc85xx_defconfig > > arch/powerpc/sysdev/fsl_rio.c will not build due to a missing > MCSR_MASK bitmask definition. > > The attached patch is based on code found in > > git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git > > and - at the least - will fix the build problem. Can we remove the use of MCSR_MASK from fsl_rio.c instead? I don't see what it's accomplishing here. MCSR_MASK will be wrong on e500mc, so exporting it as something that looks generic doesn't seem right. MCSR_BUS_RBERR also needs to change on e500mc -- you'll probably get MCSR_LDG. -Scott
On 06/04/2010 10:04 PM, Scott Wood wrote: > On 06/04/2010 06:24 AM, kerstin jonsson wrote: > >> Hi, >> >> I'm using: >> >> git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git >> >> and building for ARCH=powerpc - mpc85xx_defconfig >> >> arch/powerpc/sysdev/fsl_rio.c will not build due to a missing >> MCSR_MASK bitmask definition. >> >> The attached patch is based on code found in >> >> git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git >> >> and - at the least - will fix the build problem. >> > Can we remove the use of MCSR_MASK from fsl_rio.c instead? I don't see > what it's accomplishing here. MCSR_MASK will be wrong on e500mc, so > exporting it as something that looks generic doesn't seem right. > Thanks for pointing that out, I agree in the context it's currently used in the fsl_rio.c, it's not obvious what purpose it serves. I have a e500v2 so I guess that just removing the MCSR_MASK from the fsl_rio.c will make no difference in my case. > MCSR_BUS_RBERR also needs to change on e500mc -- you'll probably get > MCSR_LDG. > > Someone that know the e500mc probably need to have a look at this part of the fsl_rio.c then. BR, Kerstin > -Scott >
From 42d0a01865beda04b70549245ce1854c8f0074d3 Mon Sep 17 00:00:00 2001 From: Kerstin Jonsson <kerstin.jonsson@ericsson.com> Date: Fri, 4 Jun 2010 12:56:02 +0200 Subject: [PATCH] fix fsl_rio.c build problem in powerpc mpc85xx_defconfig --- arch/powerpc/include/asm/reg_booke.h | 11 +++++++++++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index 2360317..68c3833 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h @@ -231,6 +231,12 @@ #define MCSR_LDG 0x00002000UL /* Guarded Load */ #define MCSR_TLBSYNC 0x00000002UL /* Multiple tlbsyncs detected */ #define MCSR_BSL2_ERR 0x00000001UL /* Backside L2 cache error */ + +/* e500 parts may set unused bits in MCSR; mask these off */ +#define MCSR_MASK (MCSR_MCP | MCSR_ICPERR | MCSR_DCP_PERR | \ + MCSR_DCPERR | MCSR_BUS_IAERR | MCSR_BUS_RAERR | \ + MCSR_BUS_WAERR | MCSR_BUS_IBERR | MCSR_BUS_RBERR | \ + MCSR_BUS_WBERR | MCSR_BUS_IPERR | MCSR_BUS_RPERR) #endif #ifdef CONFIG_E200 @@ -243,6 +249,11 @@ #define MCSR_BUS_DRERR 0x00000008UL /* Read Bus Error on data load */ #define MCSR_BUS_WRERR 0x00000004UL /* Write Bus Error on buffered store or cache line push */ + +/* e200 parts may set unused bits in MCSR; mask these off */ +#define MCSR_MASK (MCSR_MCP | MCSR_CP_PERR | MCSR_CPERR | \ + MCSR_EXCP_ERR | MCSR_BUS_IRERR | MCSR_BUS_DRERR | \ + MCSR_BUS_WRERR) #endif /* Bit definitions for the DBSR. */ -- 1.7.1