Message ID | 1447702479-6997-3-git-send-email-serge.fdrv@gmail.com |
---|---|
State | New |
Headers | show |
diff --git a/target-arm/translate.c b/target-arm/translate.c index f1f8129..9e9f851 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -11374,6 +11374,7 @@ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb) QTAILQ_FOREACH(bp, &cs->breakpoints, entry) { if (bp->pc == dc->pc) { if (bp->flags & BP_CPU) { + gen_set_condexec(dc); gen_set_pc_im(dc, dc->pc); gen_helper_check_breakpoints(cpu_env); /* End the TB early; it's likely not going to be executed */
Architectural breakpoint check could raise an exceptions, thus condexec bits should be updated before calling gen_helper_check_breakpoints(). Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> --- target-arm/translate.c | 1 + 1 file changed, 1 insertion(+)