diff mbox

[U-Boot] ARM: mxs: fix VDDD brownout setting

Message ID 1447624032-16503-1-git-send-email-mhei@heimpold.de
State Awaiting Upstream
Delegated to: Stefano Babic
Headers show

Commit Message

Michael Heimpold Nov. 15, 2015, 9:47 p.m. UTC
At the moment, the desired brownout is at 1.0V. However,
this setting cannot be realized by hardware since we have
only 3 bits to represent the voltage difference from the
target value.

Target value is 1500 mV, brownout target is 1000 mV,
voltage steps are 25 mV.

Register content calculation:
  (1500 [mV] - 1000 [mV]) / 25 [mV] = 20 (decimal) = 0x14

  Register takes only 3 bits, that is 0x4.

But 0x4 * 25 [mV] = 100 [mV], that means that actual
brownout level is 1500 [mV] - 100 [mV] = 1.4 V.

Minimum possible BO level is
  1500 [mV] - 0x7 * 25 [mV] = 1315 [mV].

So lets use this value as desired BO value (which is
also the same as FSL bootlets use).

Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
---
 arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Marek Vasut Nov. 16, 2015, 11:01 a.m. UTC | #1
On Sunday, November 15, 2015 at 10:47:12 PM, Michael Heimpold wrote:
> At the moment, the desired brownout is at 1.0V. However,
> this setting cannot be realized by hardware since we have
> only 3 bits to represent the voltage difference from the
> target value.
> 
> Target value is 1500 mV, brownout target is 1000 mV,
> voltage steps are 25 mV.
> 
> Register content calculation:
>   (1500 [mV] - 1000 [mV]) / 25 [mV] = 20 (decimal) = 0x14
> 
>   Register takes only 3 bits, that is 0x4.
> 
> But 0x4 * 25 [mV] = 100 [mV], that means that actual
> brownout level is 1500 [mV] - 100 [mV] = 1.4 V.
> 
> Minimum possible BO level is
>   1500 [mV] - 0x7 * 25 [mV] = 1315 [mV].
> 
> So lets use this value as desired BO value (which is
> also the same as FSL bootlets use).
> 
> Signed-off-by: Michael Heimpold <mhei@heimpold.de>
> Cc: Marek Vasut <marex@denx.de>
> Cc: Otavio Salvador <otavio@ossystems.com.br>
> Cc: Fabio Estevam <fabio.estevam@freescale.com>

Uh, nice find. How did you find it?

Acked-by: Marek Vasut <marex@denx.de>

Best regards,
Marek Vasut
Michael Heimpold Nov. 16, 2015, 7:47 p.m. UTC | #2
Hi Marek,

Am Monday 16 November 2015, 12:01:36 schrieben Sie:
> On Sunday, November 15, 2015 at 10:47:12 PM, Michael Heimpold wrote:
> > At the moment, the desired brownout is at 1.0V. However,
> > this setting cannot be realized by hardware since we have
> > only 3 bits to represent the voltage difference from the
> > target value.
> > 
> > Target value is 1500 mV, brownout target is 1000 mV,
> > voltage steps are 25 mV.
> > 
> > Register content calculation:
> >   (1500 [mV] - 1000 [mV]) / 25 [mV] = 20 (decimal) = 0x14
> >   
> >   Register takes only 3 bits, that is 0x4.
> > 
> > But 0x4 * 25 [mV] = 100 [mV], that means that actual
> > brownout level is 1500 [mV] - 100 [mV] = 1.4 V.
> > 
> > Minimum possible BO level is
> > 
> >   1500 [mV] - 0x7 * 25 [mV] = 1315 [mV].
> > 
> > So lets use this value as desired BO value (which is
> > also the same as FSL bootlets use).
> > 
> > Signed-off-by: Michael Heimpold <mhei@heimpold.de>
> > Cc: Marek Vasut <marex@denx.de>
> > Cc: Otavio Salvador <otavio@ossystems.com.br>
> > Cc: Fabio Estevam <fabio.estevam@freescale.com>
> 
> Uh, nice find. How did you find it?

I was investigating a boot stall with I2SE's Duckbill devices and since we're
about to switch from FSL bootlets to U-Boot, I compared the register
settings. Then I stumbled about the comment and wondered whether
1.0V BO level makes sense for 1.5V target voltage...

Best regards,
Michael Heimpold

> 
> Acked-by: Marek Vasut <marex@denx.de>
> 
> Best regards,
> Marek Vasut
Marek Vasut Nov. 17, 2015, 8:05 a.m. UTC | #3
On Monday, November 16, 2015 at 08:47:38 PM, Michael Heimpold wrote:
> Hi Marek,

Hi!

> Am Monday 16 November 2015, 12:01:36 schrieben Sie:
> > On Sunday, November 15, 2015 at 10:47:12 PM, Michael Heimpold wrote:
> > > At the moment, the desired brownout is at 1.0V. However,
> > > this setting cannot be realized by hardware since we have
> > > only 3 bits to represent the voltage difference from the
> > > target value.
> > > 
> > > Target value is 1500 mV, brownout target is 1000 mV,
> > > voltage steps are 25 mV.
> > > 
> > > Register content calculation:
> > >   (1500 [mV] - 1000 [mV]) / 25 [mV] = 20 (decimal) = 0x14
> > >   
> > >   Register takes only 3 bits, that is 0x4.
> > > 
> > > But 0x4 * 25 [mV] = 100 [mV], that means that actual
> > > brownout level is 1500 [mV] - 100 [mV] = 1.4 V.
> > > 
> > > Minimum possible BO level is
> > > 
> > >   1500 [mV] - 0x7 * 25 [mV] = 1315 [mV].
> > > 
> > > So lets use this value as desired BO value (which is
> > > also the same as FSL bootlets use).
> > > 
> > > Signed-off-by: Michael Heimpold <mhei@heimpold.de>
> > > Cc: Marek Vasut <marex@denx.de>
> > > Cc: Otavio Salvador <otavio@ossystems.com.br>
> > > Cc: Fabio Estevam <fabio.estevam@freescale.com>
> > 
> > Uh, nice find. How did you find it?
> 
> I was investigating a boot stall with I2SE's Duckbill devices and since
> we're about to switch from FSL bootlets to U-Boot, I compared the register
> settings. Then I stumbled about the comment and wondered whether
> 1.0V BO level makes sense for 1.5V target voltage...

Heh, nice. Thanks!

Best regards,
Marek Vasut
Stefano Babic Dec. 1, 2015, 3:07 p.m. UTC | #4
On 15/11/2015 22:47, Michael Heimpold wrote:
> At the moment, the desired brownout is at 1.0V. However,
> this setting cannot be realized by hardware since we have
> only 3 bits to represent the voltage difference from the
> target value.
> 
> Target value is 1500 mV, brownout target is 1000 mV,
> voltage steps are 25 mV.
> 
> Register content calculation:
>   (1500 [mV] - 1000 [mV]) / 25 [mV] = 20 (decimal) = 0x14
> 
>   Register takes only 3 bits, that is 0x4.
> 
> But 0x4 * 25 [mV] = 100 [mV], that means that actual
> brownout level is 1500 [mV] - 100 [mV] = 1.4 V.
> 
> Minimum possible BO level is
>   1500 [mV] - 0x7 * 25 [mV] = 1315 [mV].
> 
> So lets use this value as desired BO value (which is
> also the same as FSL bootlets use).
> 
> Signed-off-by: Michael Heimpold <mhei@heimpold.de>
> Cc: Marek Vasut <marex@denx.de>
> Cc: Otavio Salvador <otavio@ossystems.com.br>
> Cc: Fabio Estevam <fabio.estevam@freescale.com>
> ---

Applied to u-boot-imx, thanks!

Best regards,
Stefano Babic
diff mbox

Patch

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
index 42f3df2..1972de8 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -1221,8 +1221,8 @@  void mxs_power_init(void)
 	debug("SPL: Setting VDDIO to 3V3 (brownout @ 3v15)\n");
 	mxs_power_set_vddx(&mxs_vddio_cfg, 3300, 3150);
 
-	debug("SPL: Setting VDDD to 1V5 (brownout @ 1v0)\n");
-	mxs_power_set_vddx(&mxs_vddd_cfg, 1500, 1000);
+	debug("SPL: Setting VDDD to 1V5 (brownout @ 1v315)\n");
+	mxs_power_set_vddx(&mxs_vddd_cfg, 1500, 1315);
 #ifdef CONFIG_MX23
 	debug("SPL: Setting mx23 VDDMEM to 2V5 (brownout @ 1v7)\n");
 	mxs_power_set_vddx(&mxs_vddmem_cfg, 2500, 1700);