From patchwork Thu Nov 5 23:41:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moritz Fischer X-Patchwork-Id: 540762 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id C7EED140E1A for ; Fri, 6 Nov 2015 10:47:06 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ettus_com.20150623.gappssmtp.com header.i=@ettus_com.20150623.gappssmtp.com header.b=FD0jfvJg; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965355AbbKEXqb (ORCPT ); Thu, 5 Nov 2015 18:46:31 -0500 Received: from mail-pa0-f49.google.com ([209.85.220.49]:32800 "EHLO mail-pa0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965963AbbKEXlg (ORCPT ); Thu, 5 Nov 2015 18:41:36 -0500 Received: by pabfh17 with SMTP id fh17so101608315pab.0 for ; Thu, 05 Nov 2015 15:41:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ettus_com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7bSmHqYORkDT57ZucOx/Dg0pwv2CUETyZCh+hMyM0XY=; b=FD0jfvJgUqF5cmcRojmNPTZRr7RiD9xLT7+0aDCh5Rdc+ieY8wUTjB8ww8T6C3x0lM i0lxPkATQNpS3lWF7RUxQiNplr8aBAgC8sP+wY3Hq85gVQUVOGx6saYFpbYCxFReRm10 sgSs/VWY94lFgpBZpA3bYPJUFr74SkHNYxCyyPq/42fez885M7hB7LJ9mTA43f/5RbqG rF+v5MtydDqi91557WZfAAhF5ddpVlO7RNbAFRKCB4NzRCWqW3M3BTcLsY42JJt7J9SJ JixFy3bTDTM4ABsdAdWSQfcS/r1xjSoHKP5e2tyJ6qFuO5SkvBOlx24DvzW3XKCTJDUq m7XA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7bSmHqYORkDT57ZucOx/Dg0pwv2CUETyZCh+hMyM0XY=; b=W2HaVhq8RJx6YFGQGdhJi33DZN0Gzs365YOGhRqLYA0cQrCGEF0XLoHpCJve0j0peM yuupPXTe3GC1mSLfhFj83bsDftr/5NQ+xKFq1+DXxaUP6fV9aK1/lVWKXxVhVmuztf9b zqH6of+fXJf0D/v8oGIWqz64BlKoIWPdp/AlLaufFWv0DYyPfwcAOgcz5nis45lKHRUB QF6ULbexbSqn8CNbX5XCh5i/USMZ/+KnAxK3Awt84x5bt3lxt8pSBhMsj/OodmUt1p9/ UQvLXfn55QHXmL1/aDAebGbtWdDsfpmfxeKS7jw/lBAei/wdWElIkYaAfLUZoTl5cnuB gNyg== X-Gm-Message-State: ALoCoQkhdIyWimPQtE4vijcPv3oH3ULv8422kIG4vpMOZcEzK/dpPkuxYJQG1XFCjpvJtD2iIR16 X-Received: by 10.68.215.67 with SMTP id og3mr12887726pbc.30.1446766895333; Thu, 05 Nov 2015 15:41:35 -0800 (PST) Received: from fenrir.amer.corp.natinst.com (207-114-172-147.static.twtelecom.net. [207.114.172.147]) by smtp.gmail.com with ESMTPSA id bn1sm9956786pad.17.2015.11.05.15.41.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 05 Nov 2015 15:41:34 -0800 (PST) From: Moritz Fischer To: linus.walleij@linaro.org Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, devicetree@vger.kernel.org, Moritz Fischer Subject: [RFC 1/3] Documentation: dt: Add devicetree bindings for NI USRP E3xx pinconf Date: Thu, 5 Nov 2015 15:41:21 -0800 Message-Id: <1446766883-25703-2-git-send-email-moritz.fischer@ettus.com> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1446766883-25703-1-git-send-email-moritz.fischer@ettus.com> References: <1446766883-25703-1-git-send-email-moritz.fischer@ettus.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Signed-off-by: Moritz Fischer --- .../devicetree/bindings/pinctrl/pinctrl-e3xx.txt | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-e3xx.txt diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-e3xx.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-e3xx.txt new file mode 100644 index 0000000..2bfbd21 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-e3xx.txt @@ -0,0 +1,27 @@ +USRP E3xx Pincontrol bindings + +The pins of the NI Ettus Research USRP E3xx idle image can be configured for different +daughterboard configurations. This pinmux is implemented in an FPGA as soft core. + +Required properties: +- compatible: Must be one of the following: + - "ettus,pinctrl-e3xx-1.0" +- clocks: The clock driving the pinmux + +Example: + + e3xx_pinctrl: e3xx-pinctrl@40200a00 { + compatible = "ettus,e3xx-pinctrl-1.0"; + reg = <0x40200a00 0x1000>; + clocks = <&clkc 15>; + + foo_state: pinconf { + conf { + pins = E31X_LED_RX1_RX; + output-low; + }; + }; + }; + +Note: Constants that facilitate creation of devicetree files are available in + include/dt-bindings/pinctrl/pinctrl-e3xx.h