| Message ID | 1446641620-11049-17-git-send-email-hl@rock-chips.com |
|---|---|
| State | Superseded |
| Delegated to: | Simon Glass |
| Headers | show |
On Wed, 2015-11-04 at 20:53 +0800, Lin Huang wrote: > rk3036 only 4K size SRAM for SPL, so only support > timer, uart, sdram driver in SPL stage, when finish > initial sdram, back to bootrom. > > Signed-off-by: Lin Huang <hl@rock-chips.com> > > > diff --git a/arch/arm/mach-rockchip/rk3036/save_boot_param.S > b/arch/arm/mach-rockchip/rk3036/save_boot_param.S > new file mode 100644 > index 0000000..3d3883d > --- /dev/null > +++ b/arch/arm/mach-rockchip/rk3036/save_boot_param.S > @@ -0,0 +1,34 @@ > +/* > + * (C) Copyright 2015 Google, Inc > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +#include <linux/linkage.h> > + > +.globl SAVE_SP_ADDR > +SAVE_SP_ADDR: > + .word 0 > + > +/******************************************************************* > ****** > + * > + * void save_boot_params > + * > + * Save sp, lr, r1~r12 > + * > + > ********************************************************************* > ****/ > +ENTRY(save_boot_params) > + push {r1-r12, lr} > + ldr r0, =SAVE_SP_ADDR > + str sp, [r0] > + b save_boot_params_ret @ back to my > caller > +ENDPROC(save_boot_params) > + > + > +.globl back_to_bootrom > +ENTRY(back_to_bootrom) > + ldr r0, =SAVE_SP_ADDR > + ldr sp, [r0] > + mov r0, #0 > + pop {r1-r12, pc} > +ENDPROC(back_to_bootrom) Is this way of going back to be bootrom generic for other Rockchip SOCs as well? Specifically for RK3288 in maskrom mode we can currently load the u-boot SPL, but not the main loader. If we could use this method of going to the bootrom on that board that should be a nice way forward. > diff --git a/include/configs/rk3036_common.h > b/include/configs/rk3036_common.h > new file mode 100644 > index 0000000..f7bd852 > --- /dev/null > +++ b/include/configs/rk3036_common.h > @@ -0,0 +1,120 @@ > +/* > + * (C) Copyright 2015 Rockchip Electronics Co., Ltd > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > > +/* RAW SD card / eMMC locations. */ > +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 > +#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) I don't think you need to define these if you're having the main u-boot image loaded by your bootrom rather then SPL directly. > +/* FAT sd card locations. */ > +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 > +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" ditto > +/* #define CONFIG_SPL_PINCTRL_SUPPORT > +#define CONFIG_SPL_GPIO_SUPPORT > +#define CONFIG_SPL_RAM_SUPPORT > +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT */ > + > +#define CONFIG_CMD_CACHE > +#define CONFIG_CMD_TIME > + > +#define CONFIG_SYS_SDRAM_BASE 0x60000000 > +#define CONFIG_NR_DRAM_BANKS 1 > +#define SDRAM_BANK_SIZE (512UL << 20UL) > + > +#define CONFIG_SPI_FLASH > +#define CONFIG_SPI > +#define CONFIG_CMD_SF > +#define CONFIG_CMD_SPI > +#define CONFIG_SPI_FLASH_GIGADEVICE > +#define CONFIG_SF_DEFAULT_SPEED 20000000 > +#define CONFIG_CMD_I2C > + > +#ifndef CONFIG_SPL_BUILD > +#include <config_distro_defaults.h> > + > +#define ENV_MEM_LAYOUT_SETTINGS \ > + "scriptaddr=0x00000000\0" \ > + "pxefile_addr_r=0x00100000\0" \ > + "fdt_addr_r=0x01f00000\0" \ > + "kernel_addr_r=0x02000000\0" \ > + "ramdisk_addr_r=0x04000000\0" I suspect these offset don't make sense for this board given your SYS_SDRAM_BASE is 0x60000000 > +/* First try to boot from SD (index 0), then eMMC (index 1 */ > +#define BOOT_TARGET_DEVICES(func) \ > + func(MMC, mmc, 0) \ > + func(MMC, mmc, 1) > + > +#include <config_distro_bootcmd.h> > + > +/* Linux fails to load the fdt if it's loaded above 512M on a Rock 2 > board, so > + * limit the fdt reallocation to that */ You probably want to change the comment here :) > +#define CONFIG_EXTRA_ENV_SETTINGS \ > + "fdt_high=0x1fffffff\0" \ Hopefully the fdt_high isn't needed on 3036? (It's hopefully temporary as well on 3288 until someone figures out what's wrong. > + ENV_MEM_LAYOUT_SETTINGS \ > + BOOTENV > +#endif > + > +#endif
Hi Sjoerd 2015-11-06 17:11 GMT+08:00 Sjoerd Simons <sjoerd.simons@collabora.co.uk>: > On Wed, 2015-11-04 at 20:53 +0800, Lin Huang wrote: > > rk3036 only 4K size SRAM for SPL, so only support > > timer, uart, sdram driver in SPL stage, when finish > > initial sdram, back to bootrom. > > > > Signed-off-by: Lin Huang <hl@rock-chips.com> > > > > > > diff --git a/arch/arm/mach-rockchip/rk3036/save_boot_param.S > > b/arch/arm/mach-rockchip/rk3036/save_boot_param.S > > new file mode 100644 > > index 0000000..3d3883d > > --- /dev/null > > +++ b/arch/arm/mach-rockchip/rk3036/save_boot_param.S > > @@ -0,0 +1,34 @@ > > +/* > > + * (C) Copyright 2015 Google, Inc > > + * > > + * SPDX-License-Identifier: GPL-2.0+ > > + */ > > + > > +#include <linux/linkage.h> > > + > > +.globl SAVE_SP_ADDR > > +SAVE_SP_ADDR: > > + .word 0 > > + > > +/******************************************************************* > > ****** > > + * > > + * void save_boot_params > > + * > > + * Save sp, lr, r1~r12 > > + * > > + > > ********************************************************************* > > ****/ > > +ENTRY(save_boot_params) > > + push {r1-r12, lr} > > + ldr r0, =SAVE_SP_ADDR > > + str sp, [r0] > > + b save_boot_params_ret @ back to my > > caller > > +ENDPROC(save_boot_params) > > + > > + > > +.globl back_to_bootrom > > +ENTRY(back_to_bootrom) > > + ldr r0, =SAVE_SP_ADDR > > + ldr sp, [r0] > > + mov r0, #0 > > + pop {r1-r12, pc} > > +ENDPROC(back_to_bootrom) > > Is this way of going back to be bootrom generic for other Rockchip SOCs > as well? > Yes > > Specifically for RK3288 in maskrom mode we can currently load the > u-boot SPL, but not the main loader. If we could use this method of > going to the bootrom on that board that should be a nice way forward. > Agree. Simon.What do you think? > > > > diff --git a/include/configs/rk3036_common.h > > b/include/configs/rk3036_common.h > > new file mode 100644 > > index 0000000..f7bd852 > > --- /dev/null > > +++ b/include/configs/rk3036_common.h > > @@ -0,0 +1,120 @@ > > +/* > > + * (C) Copyright 2015 Rockchip Electronics Co., Ltd > > + * > > + * SPDX-License-Identifier: GPL-2.0+ > > + */ > > > > +/* RAW SD card / eMMC locations. */ > > +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 > > +#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) > > I don't think you need to define these if you're having the main u-boot > image loaded by your bootrom rather then SPL directly. > > > +/* FAT sd card locations. */ > > +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 > > +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" > > ditto > > > +/* #define CONFIG_SPL_PINCTRL_SUPPORT > > +#define CONFIG_SPL_GPIO_SUPPORT > > +#define CONFIG_SPL_RAM_SUPPORT > > +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT */ > > + > > +#define CONFIG_CMD_CACHE > > +#define CONFIG_CMD_TIME > > + > > +#define CONFIG_SYS_SDRAM_BASE 0x60000000 > > +#define CONFIG_NR_DRAM_BANKS 1 > > +#define SDRAM_BANK_SIZE (512UL << 20UL) > > + > > +#define CONFIG_SPI_FLASH > > +#define CONFIG_SPI > > +#define CONFIG_CMD_SF > > +#define CONFIG_CMD_SPI > > +#define CONFIG_SPI_FLASH_GIGADEVICE > > +#define CONFIG_SF_DEFAULT_SPEED 20000000 > > > +#define CONFIG_CMD_I2C > > + > > +#ifndef CONFIG_SPL_BUILD > > +#include <config_distro_defaults.h> > > + > > +#define ENV_MEM_LAYOUT_SETTINGS \ > > + "scriptaddr=0x00000000\0" \ > > + "pxefile_addr_r=0x00100000\0" \ > > + "fdt_addr_r=0x01f00000\0" \ > > + "kernel_addr_r=0x02000000\0" \ > > + "ramdisk_addr_r=0x04000000\0" > > I suspect these offset don't make sense for this board given your > SYS_SDRAM_BASE is 0x60000000 > > > +/* First try to boot from SD (index 0), then eMMC (index 1 */ > > +#define BOOT_TARGET_DEVICES(func) \ > > + func(MMC, mmc, 0) \ > > + func(MMC, mmc, 1) > > + > > +#include <config_distro_bootcmd.h> > > + > > +/* Linux fails to load the fdt if it's loaded above 512M on a Rock 2 > > board, so > > + * limit the fdt reallocation to that */ > > You probably want to change the comment here :) > > > +#define CONFIG_EXTRA_ENV_SETTINGS \ > > + "fdt_high=0x1fffffff\0" \ > > Hopefully the fdt_high isn't needed on 3036? (It's hopefully temporary > as well on 3288 until someone figures out what's wrong. > > > + ENV_MEM_LAYOUT_SETTINGS \ > > + BOOTENV > > +#endif > > + > > +#endif > > -- > Sjoerd Simons > Collabora Ltd. > > >
Hi On 06/11/15 17:11, Sjoerd Simons wrote: > On Wed, 2015-11-04 at 20:53 +0800, Lin Huang wrote: >> rk3036 only 4K size SRAM for SPL, so only support >> timer, uart, sdram driver in SPL stage, when finish >> initial sdram, back to bootrom. >> >> Signed-off-by: Lin Huang <hl@rock-chips.com> >> >> >> diff --git a/arch/arm/mach-rockchip/rk3036/save_boot_param.S >> b/arch/arm/mach-rockchip/rk3036/save_boot_param.S >> new file mode 100644 >> index 0000000..3d3883d >> --- /dev/null >> +++ b/arch/arm/mach-rockchip/rk3036/save_boot_param.S >> @@ -0,0 +1,34 @@ >> +/* >> + * (C) Copyright 2015 Google, Inc >> + * >> + * SPDX-License-Identifier: GPL-2.0+ >> + */ >> + >> +#include <linux/linkage.h> >> + >> +.globl SAVE_SP_ADDR >> +SAVE_SP_ADDR: >> + .word 0 >> + >> +/******************************************************************* >> ****** >> + * >> + * void save_boot_params >> + * >> + * Save sp, lr, r1~r12 >> + * >> + >> ********************************************************************* >> ****/ >> +ENTRY(save_boot_params) >> + push {r1-r12, lr} >> + ldr r0, =SAVE_SP_ADDR >> + str sp, [r0] >> + b save_boot_params_ret @ back to my >> caller >> +ENDPROC(save_boot_params) >> + >> + >> +.globl back_to_bootrom >> +ENTRY(back_to_bootrom) >> + ldr r0, =SAVE_SP_ADDR >> + ldr sp, [r0] >> + mov r0, #0 >> + pop {r1-r12, pc} >> +ENDPROC(back_to_bootrom) > Is this way of going back to be bootrom generic for other Rockchip SOCs > as well? > > Specifically for RK3288 in maskrom mode we can currently load the > u-boot SPL, but not the main loader. If we could use this method of > going to the bootrom on that board that should be a nice way forward. > > >> diff --git a/include/configs/rk3036_common.h >> b/include/configs/rk3036_common.h >> new file mode 100644 >> index 0000000..f7bd852 >> --- /dev/null >> +++ b/include/configs/rk3036_common.h >> @@ -0,0 +1,120 @@ >> +/* >> + * (C) Copyright 2015 Rockchip Electronics Co., Ltd >> + * >> + * SPDX-License-Identifier: GPL-2.0+ >> + */ >> >> +/* RAW SD card / eMMC locations. */ >> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 >> +#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) > I don't think you need to define these if you're having the main u-boot > image loaded by your bootrom rather then SPL directly. yes, you are right, i just sended v3, will correct it in v4, thank you. >> +/* FAT sd card locations. */ >> +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 >> +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" > ditto > >> +/* #define CONFIG_SPL_PINCTRL_SUPPORT >> +#define CONFIG_SPL_GPIO_SUPPORT >> +#define CONFIG_SPL_RAM_SUPPORT >> +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT */ >> + >> +#define CONFIG_CMD_CACHE >> +#define CONFIG_CMD_TIME >> + >> +#define CONFIG_SYS_SDRAM_BASE 0x60000000 >> +#define CONFIG_NR_DRAM_BANKS 1 >> +#define SDRAM_BANK_SIZE (512UL << 20UL) >> + >> +#define CONFIG_SPI_FLASH >> +#define CONFIG_SPI >> +#define CONFIG_CMD_SF >> +#define CONFIG_CMD_SPI >> +#define CONFIG_SPI_FLASH_GIGADEVICE >> +#define CONFIG_SF_DEFAULT_SPEED 20000000 >> +#define CONFIG_CMD_I2C >> + >> +#ifndef CONFIG_SPL_BUILD >> +#include <config_distro_defaults.h> >> + >> +#define ENV_MEM_LAYOUT_SETTINGS \ >> + "scriptaddr=0x00000000\0" \ >> + "pxefile_addr_r=0x00100000\0" \ >> + "fdt_addr_r=0x01f00000\0" \ >> + "kernel_addr_r=0x02000000\0" \ >> + "ramdisk_addr_r=0x04000000\0" > I suspect these offset don't make sense for this board given your > SYS_SDRAM_BASE is 0x60000000 Have been correct in v3 patch. >> +/* First try to boot from SD (index 0), then eMMC (index 1 */ >> +#define BOOT_TARGET_DEVICES(func) \ >> + func(MMC, mmc, 0) \ >> + func(MMC, mmc, 1) >> + >> +#include <config_distro_bootcmd.h> >> + >> +/* Linux fails to load the fdt if it's loaded above 512M on a Rock 2 >> board, so >> + * limit the fdt reallocation to that */ > You probably want to change the comment here :) > yes, will modify it in v4 >> +#define CONFIG_EXTRA_ENV_SETTINGS \ >> + "fdt_high=0x1fffffff\0" \ > Hopefully the fdt_high isn't needed on 3036? (It's hopefully temporary > as well on 3288 until someone figures out what's wrong. sorry, i am not very clear why 3288 need it. >> + ENV_MEM_LAYOUT_SETTINGS \ >> + BOOTENV >> +#endif >> + >> +#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index da665ef..6b608db 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -9,6 +9,14 @@ config ROCKCHIP_RK3288 and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART,s, SPI, I2C and PWMs. +config ROCKCHIP_RK3036 + bool "Support Rockchip RK3036" + help + The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 + including NEON and GPU, Mali-400 graphics, several DDR3 options + and video codec support. Peripherals include Gigabit Ethernet, + USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. + config SYS_MALLOC_F default y @@ -34,5 +42,5 @@ config ROCKCHIP_SERIAL default y source "arch/arm/mach-rockchip/rk3288/Kconfig" - +source "arch/arm/mach-rockchip/rk3036/Kconfig" endif diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index a29675d..b703c3c 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -6,10 +6,12 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o +obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o else -obj-y += board.o +obj-$(CONFIG_ROCKCHIP_RK3288) += board.o endif obj-y += rk_timer.o obj-y += rk_early_print.o obj-$(CONFIG_$(SPL_)ROCKCHIP_COMMON) += common.o obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/ +obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/ diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index 688bc0f..d7a8312 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -4,6 +4,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include <asm/io.h> #include <common.h> #include <dm.h> #include <ram.h> diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c new file mode 100644 index 0000000..734dfe5 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3036-board-spl.c @@ -0,0 +1,44 @@ +/* + * (C) Copyright 2015 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <asm/arch/grf_rk3036.h> +#include <asm/arch/hardware.h> +#include <asm/arch/sdram_rk3036.h> +#include <asm/arch/timer.h> +#include <asm/arch/uart.h> +#include <asm/io.h> +#include <common.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define GRF_BASE 0x20008000 +static struct rk3036_grf * const grf = (void *)GRF_BASE; + +extern void back_to_bootrom(void); + +void board_init_f(ulong dummy) +{ + //Debug UART can be used from here if required: + rk_clrsetreg(&grf->gpio1c_iomux, + GPIO1C3_MASK << GPIO1C3_SHIFT | + GPIO1C2_MASK << GPIO1C2_SHIFT, + GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT | + GPIO1C2_UART2_SIN << GPIO1C2_SHIFT); + rk_uart_init(); + rockchip_timer_init(); + sdram_init(); + + /* return to maskrom */ + back_to_bootrom(); +} + +/* Place Holders */ +void board_init_r(gd_t *id, ulong dest_addr) +{ + /* Function attribute is no-return */ + /* This Function never executes */ + while (1) + ; +} diff --git a/arch/arm/mach-rockchip/rk3036/Kconfig b/arch/arm/mach-rockchip/rk3036/Kconfig new file mode 100644 index 0000000..0fbc58e --- /dev/null +++ b/arch/arm/mach-rockchip/rk3036/Kconfig @@ -0,0 +1,17 @@ +if ROCKCHIP_RK3036 + +config TARGET_EVB_RK3036 + bool "EVB_RK3036" + +config SYS_SOC + default "rockchip" + +config SYS_MALLOC_F_LEN + default 0x400 + +config ROCKCHIP_COMMON + bool "Support rk common fuction" + +source "board/evb_rk3036/evb_rk3036/Kconfig" + +endif diff --git a/arch/arm/mach-rockchip/rk3036/Makefile b/arch/arm/mach-rockchip/rk3036/Makefile index 6095777..97d299d 100644 --- a/arch/arm/mach-rockchip/rk3036/Makefile +++ b/arch/arm/mach-rockchip/rk3036/Makefile @@ -10,3 +10,4 @@ obj-y += syscon_rk3036.o endif obj-y += sdram_rk3036.o +obj-y += save_boot_param.o diff --git a/arch/arm/mach-rockchip/rk3036/save_boot_param.S b/arch/arm/mach-rockchip/rk3036/save_boot_param.S new file mode 100644 index 0000000..3d3883d --- /dev/null +++ b/arch/arm/mach-rockchip/rk3036/save_boot_param.S @@ -0,0 +1,34 @@ +/* + * (C) Copyright 2015 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/linkage.h> + +.globl SAVE_SP_ADDR +SAVE_SP_ADDR: + .word 0 + +/************************************************************************* + * + * void save_boot_params + * + * Save sp, lr, r1~r12 + * + *************************************************************************/ +ENTRY(save_boot_params) + push {r1-r12, lr} + ldr r0, =SAVE_SP_ADDR + str sp, [r0] + b save_boot_params_ret @ back to my caller +ENDPROC(save_boot_params) + + +.globl back_to_bootrom +ENTRY(back_to_bootrom) + ldr r0, =SAVE_SP_ADDR + ldr sp, [r0] + mov r0, #0 + pop {r1-r12, pc} +ENDPROC(back_to_bootrom) diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h new file mode 100644 index 0000000..f7bd852 --- /dev/null +++ b/include/configs/rk3036_common.h @@ -0,0 +1,120 @@ +/* + * (C) Copyright 2015 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __CONFIG_RK3036_COMMON_H +#define __CONFIG_RK3036_COMMON_H + +#include <asm/arch/hardware.h> + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_MALLOC_LEN (32 << 20) +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_THUMB_BUILD +/* #define CONFIG_OF_LIBFDT */ +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) +#define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ +#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) + +/* #define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_MEM32 +/* #define CONFIG_SPL_BOARD_INIT */ + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MALLOC_SIMPLE +#endif + +#define CONFIG_SYS_TEXT_BASE 0x60000000 +#define CONFIG_SYS_INIT_SP_ADDR 0x60100000 +#define CONFIG_SYS_LOAD_ADDR 0x60800800 +#define CONFIG_SPL_STACK 0x10081fff +#define CONFIG_SPL_TEXT_BASE 0x10081004 + +#define CONFIG_ROCKCHIP_COMMON + +/* MMC/SD IP block */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_MMC +#define CONFIG_SDHCI +#define CONFIG_ROCKCHIP_3036_DWMMC +#define CONFIG_BOUNCE_BUFFER + +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_FAT +#define CONFIG_FAT_WRITE +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_PARTITION_UUIDS +#define CONFIG_CMD_PART + +/* RAW SD card / eMMC locations. */ +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 +#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) + +/* FAT sd card locations. */ +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" + +/* #define CONFIG_SPL_PINCTRL_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT +#define CONFIG_SPL_RAM_SUPPORT +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT */ + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_TIME + +#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CONFIG_NR_DRAM_BANKS 1 +#define SDRAM_BANK_SIZE (512UL << 20UL) + +#define CONFIG_SPI_FLASH +#define CONFIG_SPI +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_SPI_FLASH_GIGADEVICE +#define CONFIG_SF_DEFAULT_SPEED 20000000 + +#define CONFIG_CMD_I2C + +#ifndef CONFIG_SPL_BUILD +#include <config_distro_defaults.h> + +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x00000000\0" \ + "pxefile_addr_r=0x00100000\0" \ + "fdt_addr_r=0x01f00000\0" \ + "kernel_addr_r=0x02000000\0" \ + "ramdisk_addr_r=0x04000000\0" + +/* First try to boot from SD (index 0), then eMMC (index 1 */ +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(MMC, mmc, 1) + +#include <config_distro_bootcmd.h> + +/* Linux fails to load the fdt if it's loaded above 512M on a Rock 2 board, so + * limit the fdt reallocation to that */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0x1fffffff\0" \ + ENV_MEM_LAYOUT_SETTINGS \ + BOOTENV +#endif + +#endif
rk3036 only 4K size SRAM for SPL, so only support timer, uart, sdram driver in SPL stage, when finish initial sdram, back to bootrom. Signed-off-by: Lin Huang <hl@rock-chips.com> --- Changes in v1: - clean copyright announcement Changes in v2: - support SPL arch/arm/mach-rockchip/Kconfig | 10 +- arch/arm/mach-rockchip/Makefile | 4 +- arch/arm/mach-rockchip/board.c | 1 + arch/arm/mach-rockchip/rk3036-board-spl.c | 44 +++++++++ arch/arm/mach-rockchip/rk3036/Kconfig | 17 ++++ arch/arm/mach-rockchip/rk3036/Makefile | 1 + arch/arm/mach-rockchip/rk3036/save_boot_param.S | 34 +++++++ include/configs/rk3036_common.h | 120 ++++++++++++++++++++++++ 8 files changed, 229 insertions(+), 2 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk3036-board-spl.c create mode 100644 arch/arm/mach-rockchip/rk3036/Kconfig create mode 100644 arch/arm/mach-rockchip/rk3036/save_boot_param.S create mode 100644 include/configs/rk3036_common.h