From patchwork Fri May 28 17:43:25 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: cmchao X-Patchwork-Id: 53936 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 5DBF0B6EFF for ; Sat, 29 May 2010 04:00:36 +1000 (EST) Received: from localhost ([127.0.0.1]:43126 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OI3pc-0004ck-Iy for incoming@patchwork.ozlabs.org; Fri, 28 May 2010 13:58:52 -0400 Received: from [140.186.70.92] (port=39801 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OI3bU-0005o4-D8 for qemu-devel@nongnu.org; Fri, 28 May 2010 13:44:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OI3bQ-00082k-FP for qemu-devel@nongnu.org; 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Fri, 28 May 2010 10:44:11 -0700 (PDT) Received: from localhost.localdomain (114-44-100-131.dynamic.hinet.net [114.44.100.131]) by mx.google.com with ESMTPS id o38sm2248891rvp.12.2010.05.28.10.44.09 (version=TLSv1/SSLv3 cipher=RC4-MD5); Fri, 28 May 2010 10:44:11 -0700 (PDT) From: cmchao To: qemu-devel@nongnu.org Date: Sat, 29 May 2010 01:43:25 +0800 Message-Id: <1275068605-14475-13-git-send-email-cmchao@gmail.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1275068605-14475-1-git-send-email-cmchao@gmail.com> References: <1275068605-14475-1-git-send-email-cmchao@gmail.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: cmchao Subject: [Qemu-devel] [PATCH 12/12] hw/omap : make local function static and remove declaration from header X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: cmchao --- hw/omap.h | 36 ------------------------------------ hw/omap1.c | 10 +++++----- hw/omap2.c | 6 +++--- 3 files changed, 8 insertions(+), 44 deletions(-) diff --git a/hw/omap.h b/hw/omap.h index 34443b4..18eb72b 100644 --- a/hw/omap.h +++ b/hw/omap.h @@ -108,15 +108,6 @@ struct omap_intr_handler_s *omap2_inth_init(target_phys_addr_t base, void omap_inth_reset(struct omap_intr_handler_s *s); qemu_irq omap_inth_get_pin(struct omap_intr_handler_s *s, int n); -struct omap_prcm_s; -struct omap_prcm_s *omap_prcm_init(struct omap_target_agent_s *ta, - qemu_irq mpu_int, qemu_irq dsp_int, qemu_irq iva_int, - struct omap_mpu_state_s *mpu); - -struct omap_sysctl_s; -struct omap_sysctl_s *omap_sysctl_init(struct omap_target_agent_s *ta, - omap_clk iclk, struct omap_mpu_state_s *mpu); - /* OMAP2 SDRAM controller */ struct omap_sdrc_s; struct omap_sdrc_s *omap_sdrc_init(target_phys_addr_t base); @@ -658,34 +649,18 @@ struct omap_dma_lcd_channel_s { # define OMAP24XX_DMA_EXT_DMAREQ5 64 /* omap[123].c */ -struct omap_mpu_timer_s; -struct omap_mpu_timer_s *omap_mpu_timer_init(target_phys_addr_t base, - qemu_irq irq, omap_clk clk); - /* OMAP2 gp timer */ struct omap_gp_timer_s; struct omap_gp_timer_s *omap_gp_timer_init(struct omap_target_agent_s *ta, qemu_irq irq, omap_clk fclk, omap_clk iclk); void omap_gp_timer_reset(struct omap_gp_timer_s *s); -struct omap_watchdog_timer_s; -struct omap_watchdog_timer_s *omap_wd_timer_init(target_phys_addr_t base, - qemu_irq irq, omap_clk clk); - -struct omap_32khz_timer_s; -struct omap_32khz_timer_s *omap_os_timer_init(target_phys_addr_t base, - qemu_irq irq, omap_clk clk); - /* OMAP2 sysctimer */ struct omap_synctimer_s; struct omap_synctimer_s *omap_synctimer_init(struct omap_target_agent_s *ta, struct omap_mpu_state_s *mpu, omap_clk fclk, omap_clk iclk); void omap_synctimer_reset(struct omap_synctimer_s *s); -struct omap_tipb_bridge_s; -struct omap_tipb_bridge_s *omap_tipb_bridge_init(target_phys_addr_t base, - qemu_irq abort_irq, omap_clk clk); - struct omap_uart_s; struct omap_uart_s *omap_uart_init(target_phys_addr_t base, qemu_irq irq, omap_clk fclk, omap_clk iclk, @@ -740,10 +715,6 @@ void omap_mcspi_attach(struct omap_mcspi_s *s, int chipselect); void omap_mcspi_reset(struct omap_mcspi_s *s); -struct omap_rtc_s; -struct omap_rtc_s *omap_rtc_init(target_phys_addr_t base, - qemu_irq *irq, omap_clk clk); - struct I2SCodec { void *opaque; @@ -773,16 +744,9 @@ struct omap_mcbsp_s *omap_mcbsp_init(target_phys_addr_t base, qemu_irq *irq, qemu_irq *dma, omap_clk clk); void omap_mcbsp_i2s_attach(struct omap_mcbsp_s *s, I2SCodec *slave); -struct omap_lpg_s; -struct omap_lpg_s *omap_lpg_init(target_phys_addr_t base, omap_clk clk); - void omap_tap_init(struct omap_target_agent_s *ta, struct omap_mpu_state_s *mpu); -struct omap_eac_s; -struct omap_eac_s *omap_eac_init(struct omap_target_agent_s *ta, - qemu_irq irq, qemu_irq *drq, omap_clk fclk, omap_clk iclk); - /* omap_lcdc.c */ struct omap_lcd_panel_s; void omap_lcdc_reset(struct omap_lcd_panel_s *s); diff --git a/hw/omap1.c b/hw/omap1.c index 301eec5..e38fd83 100644 --- a/hw/omap1.c +++ b/hw/omap1.c @@ -247,7 +247,7 @@ static void omap_mpu_timer_reset(struct omap_mpu_timer_s *s) s->it_ena = 1; } -struct omap_mpu_timer_s *omap_mpu_timer_init(target_phys_addr_t base, +static struct omap_mpu_timer_s *omap_mpu_timer_init(target_phys_addr_t base, qemu_irq irq, omap_clk clk) { int iomemtype; @@ -371,7 +371,7 @@ static void omap_wd_timer_reset(struct omap_watchdog_timer_s *s) omap_timer_update(&s->timer); } -struct omap_watchdog_timer_s *omap_wd_timer_init(target_phys_addr_t base, +static struct omap_watchdog_timer_s *omap_wd_timer_init(target_phys_addr_t base, qemu_irq irq, omap_clk clk) { int iomemtype; @@ -473,7 +473,7 @@ static void omap_os_timer_reset(struct omap_32khz_timer_s *s) s->timer.ar = 1; } -struct omap_32khz_timer_s *omap_os_timer_init(target_phys_addr_t base, +static struct omap_32khz_timer_s *omap_os_timer_init(target_phys_addr_t base, qemu_irq irq, omap_clk clk) { int iomemtype; @@ -1180,7 +1180,7 @@ static void omap_tipb_bridge_reset(struct omap_tipb_bridge_s *s) s->enh_control = 0x000f; } -struct omap_tipb_bridge_s *omap_tipb_bridge_init(target_phys_addr_t base, +static struct omap_tipb_bridge_s *omap_tipb_bridge_init(target_phys_addr_t base, qemu_irq abort_irq, omap_clk clk) { int iomemtype; @@ -3506,7 +3506,7 @@ static void omap_lpg_clk_update(void *opaque, int line, int on) omap_lpg_update(s); } -struct omap_lpg_s *omap_lpg_init(target_phys_addr_t base, omap_clk clk) +static struct omap_lpg_s *omap_lpg_init(target_phys_addr_t base, omap_clk clk) { int iomemtype; struct omap_lpg_s *s = (struct omap_lpg_s *) diff --git a/hw/omap2.c b/hw/omap2.c index 9bac954..26e6da4 100644 --- a/hw/omap2.c +++ b/hw/omap2.c @@ -583,7 +583,7 @@ static CPUWriteMemoryFunc * const omap_eac_writefn[] = { omap_badwidth_write16, }; -struct omap_eac_s *omap_eac_init(struct omap_target_agent_s *ta, +static struct omap_eac_s *omap_eac_init(struct omap_target_agent_s *ta, qemu_irq irq, qemu_irq *drq, omap_clk fclk, omap_clk iclk) { int iomemtype; @@ -1783,7 +1783,7 @@ static void omap_prcm_coldreset(struct omap_prcm_s *s) omap_prcm_reset(s); } -struct omap_prcm_s *omap_prcm_init(struct omap_target_agent_s *ta, +static struct omap_prcm_s *omap_prcm_init(struct omap_target_agent_s *ta, qemu_irq mpu_int, qemu_irq dsp_int, qemu_irq iva_int, struct omap_mpu_state_s *mpu) { @@ -2157,7 +2157,7 @@ static void omap_sysctl_reset(struct omap_sysctl_s *s) s->padconf[0x44] = 0x00000800; } -struct omap_sysctl_s *omap_sysctl_init(struct omap_target_agent_s *ta, +static struct omap_sysctl_s *omap_sysctl_init(struct omap_target_agent_s *ta, omap_clk iclk, struct omap_mpu_state_s *mpu) { int iomemtype;