From patchwork Thu May 27 20:45:51 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [09/62] tcg-s390: Mark R0 & R15 reserved. Date: Thu, 27 May 2010 10:45:51 -0000 From: Richard Henderson X-Patchwork-Id: 53798 Message-Id: <1274993204-30766-10-git-send-email-rth@twiddle.net> To: qemu-devel@nongnu.org Cc: agraf@suse.de, aurelien@aurel32.net Don't merely exclude them from the register allocation order. Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.c | 7 +++++-- 1 files changed, 5 insertions(+), 2 deletions(-) diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c index eb3ca38..6988937 100644 --- a/tcg/s390/tcg-target.c +++ b/tcg/s390/tcg-target.c @@ -124,8 +124,7 @@ static const int tcg_target_reg_alloc_order[] = { TCG_REG_R12, TCG_REG_R13, TCG_REG_R14, - /* XXX many insns can't be used with R0, so we better avoid it for now */ - /* TCG_REG_R0 */ + TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, TCG_REG_R3, @@ -1304,6 +1303,10 @@ void tcg_target_init(TCGContext *s) tcg_regset_set_reg(s->reserved_regs, TCG_REG_R13); /* another temporary */ tcg_regset_set_reg(s->reserved_regs, TCG_REG_R12); + /* XXX many insns can't be used with R0, so we better avoid it for now */ + tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0); + /* The stack pointer. */ + tcg_regset_set_reg(s->reserved_regs, TCG_REG_R15); tcg_add_target_add_op_defs(s390_op_defs); }