From patchwork Thu May 27 20:45:44 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 53784 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 18295B7D1D for ; Fri, 28 May 2010 06:48:43 +1000 (EST) Received: from localhost ([127.0.0.1]:53023 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OHk0O-0001pO-6O for incoming@patchwork.ozlabs.org; Thu, 27 May 2010 16:48:40 -0400 Received: from [140.186.70.92] (port=37822 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OHjyf-0001lC-Eh for qemu-devel@nongnu.org; Thu, 27 May 2010 16:46:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OHjyd-0005As-Mm for qemu-devel@nongnu.org; Thu, 27 May 2010 16:46:53 -0400 Received: from are.twiddle.net ([75.149.56.221]:36604) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OHjyd-0005Ad-CU for qemu-devel@nongnu.org; Thu, 27 May 2010 16:46:51 -0400 Received: from anchor.twiddle.home (anchor.twiddle.home [172.31.0.4]) by are.twiddle.net (Postfix) with ESMTPS id 9C0A0A21; Thu, 27 May 2010 13:46:50 -0700 (PDT) Received: from anchor.twiddle.home (anchor.twiddle.home [127.0.0.1]) by anchor.twiddle.home (8.14.4/8.14.4) with ESMTP id o4RKko6B030843; Thu, 27 May 2010 13:46:50 -0700 Received: (from rth@localhost) by anchor.twiddle.home (8.14.4/8.14.4/Submit) id o4RKknFT030842; Thu, 27 May 2010 13:46:49 -0700 From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 27 May 2010 13:45:44 -0700 Message-Id: <1274993204-30766-3-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.0.1 In-Reply-To: <1274993204-30766-1-git-send-email-rth@twiddle.net> References: <1274993204-30766-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: Alexander Graf , aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 02/62] add lost chunks from the original patch X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Alexander Graf --- tcg/s390/tcg-target.c | 3 ++ tcg/s390/tcg-target.h | 86 +++++++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 86 insertions(+), 3 deletions(-) diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c index d2a93c2..45c1bf7 100644 --- a/tcg/s390/tcg-target.c +++ b/tcg/s390/tcg-target.c @@ -96,6 +96,9 @@ static void *qemu_st_helpers[4] = { __stl_mmu, __stq_mmu, }; +#endif + +static uint8_t *tb_ret_addr; static void patch_reloc(uint8_t *code_ptr, int type, tcg_target_long value, tcg_target_long addend) diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index d8a2955..bd72115 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -47,7 +47,7 @@ enum { #define TCG_TARGET_NB_REGS 16 /* optional instructions */ -// #define TCG_TARGET_HAS_div_i32 +#define TCG_TARGET_HAS_div_i32 // #define TCG_TARGET_HAS_rot_i32 // #define TCG_TARGET_HAS_ext8s_i32 // #define TCG_TARGET_HAS_ext16s_i32 @@ -56,7 +56,7 @@ enum { // #define TCG_TARGET_HAS_bswap16_i32 // #define TCG_TARGET_HAS_bswap32_i32 // #define TCG_TARGET_HAS_not_i32 -// #define TCG_TARGET_HAS_neg_i32 +#define TCG_TARGET_HAS_neg_i32 // #define TCG_TARGET_HAS_andc_i32 // #define TCG_TARGET_HAS_orc_i32 // #define TCG_TARGET_HAS_eqv_i32 @@ -75,7 +75,7 @@ enum { // #define TCG_TARGET_HAS_bswap32_i64 // #define TCG_TARGET_HAS_bswap64_i64 // #define TCG_TARGET_HAS_not_i64 -// #define TCG_TARGET_HAS_neg_i64 +#define TCG_TARGET_HAS_neg_i64 // #define TCG_TARGET_HAS_andc_i64 // #define TCG_TARGET_HAS_orc_i64 // #define TCG_TARGET_HAS_eqv_i64 @@ -87,6 +87,86 @@ enum { #define TCG_TARGET_STACK_ALIGN 8 #define TCG_TARGET_CALL_STACK_OFFSET 0 +#define TCG_CT_CONST_S16 0x100 +#define TCG_CT_CONST_U12 0x200 + +#define E3_LG 0x04 +#define E3_LRVG 0x0f +#define E3_LGF 0x14 +#define E3_LGH 0x15 +#define E3_LLGF 0x16 +#define E3_LRV 0x1e +#define E3_LRVH 0x1f +#define E3_CG 0x20 +#define E3_STG 0x24 +#define E3_STRVG 0x2f +#define E3_STRV 0x3e +#define E3_STRVH 0x3f +#define E3_STHY 0x70 +#define E3_STCY 0x72 +#define E3_LGB 0x77 +#define E3_LLGC 0x90 +#define E3_LLGH 0x91 + +#define B9_LGR 0x04 +#define B9_AGR 0x08 +#define B9_SGR 0x09 +#define B9_MSGR 0x0c +#define B9_LGFR 0x14 +#define B9_LLGFR 0x16 +#define B9_CGR 0x20 +#define B9_CLGR 0x21 +#define B9_NGR 0x80 +#define B9_OGR 0x81 +#define B9_XGR 0x82 +#define B9_DLGR 0x87 +#define B9_DLR 0x97 + +#define RR_BASR 0x0d +#define RR_NR 0x14 +#define RR_CLR 0x15 +#define RR_OR 0x16 +#define RR_XR 0x17 +#define RR_LR 0x18 +#define RR_CR 0x19 +#define RR_AR 0x1a +#define RR_SR 0x1b + +#define A7_AHI 0xa +#define A7_AHGI 0xb + +#define SH64_REG_NONE 0x00 /* use immediate only (not R0!) */ +#define SH64_SRAG 0x0a +#define SH64_SRLG 0x0c +#define SH64_SLLG 0x0d + +#define SH32_REG_NONE 0x00 /* use immediate only (not R0!) */ +#define SH32_SRL 0x08 +#define SH32_SLL 0x09 +#define SH32_SRA 0x0a + +#define ST_STH 0x40 +#define ST_STC 0x42 +#define ST_ST 0x50 + +#define LD_SIGNED 0x04 +#define LD_UINT8 0x00 +#define LD_INT8 (LD_UINT8 | LD_SIGNED) +#define LD_UINT16 0x01 +#define LD_INT16 (LD_UINT16 | LD_SIGNED) +#define LD_UINT32 0x02 +#define LD_INT32 (LD_UINT32 | LD_SIGNED) +#define LD_UINT64 0x03 +#define LD_INT64 (LD_UINT64 | LD_SIGNED) + +#define S390_INS_BCR 0x0700 +#define S390_INS_BR (S390_INS_BCR | 0x00f0) +#define S390_INS_IILH 0xa5020000 +#define S390_INS_LLILL 0xa50f0000 +#define S390_INS_LGHI 0xa7090000 +#define S390_INS_MSR 0xb2520000 +#define S390_INS_LARL 0xc000 + enum { /* Note: must be synced with dyngen-exec.h */ TCG_AREG0 = TCG_REG_R10,