| Message ID | 1446056535-9315-1-git-send-email-jteki@openedev.com |
|---|---|
| State | Accepted |
| Delegated to: | Tom Rini |
| Headers | show |
On Wed, Oct 28, 2015 at 4:22 PM, Jagan Teki <jteki@openedev.com> wrote: > Please pull this PR, and skip the previous one [1] > > [1] https://patchwork.ozlabs.org/patch/535548/ What about Fabio's serie? it is required for the Congatec support to go in as well.
On 28 October 2015 at 23:55, Otavio Salvador <otavio.salvador@ossystems.com.br> wrote: > On Wed, Oct 28, 2015 at 4:22 PM, Jagan Teki <jteki@openedev.com> wrote: >> Please pull this PR, and skip the previous one [1] >> >> [1] https://patchwork.ozlabs.org/patch/535548/ > > What about Fabio's serie? it is required for the Congatec support to > go in as well. Next TODO! thanks!
On Wed, Oct 28, 2015 at 11:52:15PM +0530, Jagan Teki wrote: > Hi Tom, > > Please pull this PR, and skip the previous one [1] > > [1] https://patchwork.ozlabs.org/patch/535548/ > > thanks! > Jagan. > > The following changes since commit 677f970bc62a661690b3431543d5a5d5e682ba70: > > common/board_f.c: modify the macro to use get_clocks() more common (2015-10-24 13:50:38 -0400) > > are available in the git repository at: > > git://git.denx.de/u-boot-spi.git master > > for you to fetch changes up to bef87adf95e7ca923f866e27bbcccb2dad85df9f: > > spi: altera_spi: Minor cleanup (2015-10-28 13:54:09 +0530) > Applied to u-boot/master, thanks!
Hi Tom, Please pull this PR, and skip the previous one [1] [1] https://patchwork.ozlabs.org/patch/535548/ thanks! Jagan. The following changes since commit 677f970bc62a661690b3431543d5a5d5e682ba70: common/board_f.c: modify the macro to use get_clocks() more common (2015-10-24 13:50:38 -0400) are available in the git repository at: git://git.denx.de/u-boot-spi.git master for you to fetch changes up to bef87adf95e7ca923f866e27bbcccb2dad85df9f: spi: altera_spi: Minor cleanup (2015-10-28 13:54:09 +0530) ---------------------------------------------------------------- Jagan Teki (51): spi: Add zynq qspi controller driver dts: zynq: Add zynq qspi controller nodes doc: device-tree-bindings: spi: Add zynq qspi info dts: microzed: Enable zynq qspi controller node dts: zc702: Enable zynq qspi controller node dts: zc706: Enable zynq qspi controller node dts: zc770-xm010: Enable zynq qspi controller node dts: zed: Enable zynq qspi controller node configs: Enable legacy SPI flash interface support zynq-common: Enable zynq qspi controller support zynq-common: Enable Bank/Extended address register support configs: zynq: Enable zynq qspi controller spi: Kconfig: Add Zynq QSPI controller entry spi: zynq_spi: Add config reg shift named macros spi: zynq_spi: Rename baudrate divisor mask name spi: zynq_spi: Store cs value into private data sf: params: Add IS25LP032 part support sf: params: Add IS25LP064 part support sf: params: Add IS25LP128 part support zynq-common: Enable ISSI SPI-NOR flash support spi: zynq_qspi: Fix to configure CPOL, CPHA mask spi: zynq_spi: Remove unneeded headers sf: Return bank_sel, if flash->bank_curr == bank_sel sf: Add spi_flash_read_bar sf: Optimize BAR write code sf: Make flash->flags use for generic usage sf: Update status reg check in spi_flash_cmd_wait_ready sf: Add FSR support to spi_flash_cmd_wait_ready spi: zynq_qspi: Minor cleanups spi: zynq_[q]spi: Use BIT macro spi: zynq_[q]spi: Use GENMASK macro spi: atmel_spi: Use BIT macro spi: bfin_spi6xx: Use BIT macro spi: cadence_qspi_apb: Use BIT macro spi: designware_spi: Use BIT macro spi: fsl: Use BIT macro spi: ich: Use BIT macro spi: mpc8xxx_spi: Use BIT macro spi: omap3_spi: Use BIT macro spi: sh_qspi: Use BIT macro spi: tegra: Use BIT macro spi: ti_qspi: Use BIT macro spi: xilinx_spi: Use BIT macro spi: atmel_spi: Use GENMASK spi: designware_spi: Use GENMASK spi: fsl_qspi: Use GENMASK spi: omap3_spi: Use GENMASK spi: tegra: Use GENMASK spi: xilinx_spi: Use GENMASK spi: altera_spi: Use BIT macro spi: altera_spi: Minor cleanup Siva Durga Prasad Paladugu (1): zynq-common: Add SPL SPI offset, size configs arch/arm/dts/zynq-7000.dtsi | 12 + arch/arm/dts/zynq-microzed.dts | 5 + arch/arm/dts/zynq-zc702.dts | 5 + arch/arm/dts/zynq-zc706.dts | 5 + arch/arm/dts/zynq-zc770-xm010.dts | 7 +- arch/arm/dts/zynq-zed.dts | 5 + configs/zynq_microzed_defconfig | 2 + configs/zynq_zc702_defconfig | 2 + configs/zynq_zc706_defconfig | 2 + configs/zynq_zc70x_defconfig | 2 + configs/zynq_zc770_xm010_defconfig | 1 + configs/zynq_zed_defconfig | 2 + doc/device-tree-bindings/spi/spi-zynq-qspi.txt | 26 ++ drivers/mtd/spi/sf_internal.h | 5 + drivers/mtd/spi/sf_ops.c | 138 +++--- drivers/mtd/spi/sf_params.c | 5 + drivers/mtd/spi/sf_probe.c | 67 +-- drivers/spi/Kconfig | 9 + drivers/spi/Makefile | 1 + drivers/spi/altera_spi.c | 10 +- drivers/spi/atmel_spi.h | 54 +-- drivers/spi/bfin_spi6xx.c | 8 +- drivers/spi/cadence_qspi_apb.c | 28 +- drivers/spi/designware_spi.c | 16 +- drivers/spi/fsl_dspi.c | 2 +- drivers/spi/fsl_espi.c | 20 +- drivers/spi/fsl_qspi.c | 6 +- drivers/spi/ich.c | 4 +- drivers/spi/mpc8xxx_spi.c | 2 +- drivers/spi/omap3_spi.h | 64 +-- drivers/spi/sh_qspi.c | 16 +- drivers/spi/tegra114_spi.c | 76 +-- drivers/spi/tegra20_sflash.c | 54 +-- drivers/spi/tegra20_slink.c | 62 +-- drivers/spi/ti_qspi.c | 10 +- drivers/spi/xilinx_spi.c | 46 +- drivers/spi/zynq_qspi.c | 621 +++++++++++++++++++++++++ drivers/spi/zynq_spi.c | 46 +- include/configs/zynq-common.h | 15 + include/spi_flash.h | 6 +- 40 files changed, 1101 insertions(+), 366 deletions(-) create mode 100644 doc/device-tree-bindings/spi/spi-zynq-qspi.txt create mode 100644 drivers/spi/zynq_qspi.c