Patchwork qemu: Enable XSAVE related CPUID

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Submitter Sheng Yang
Date May 27, 2010, 9:50 a.m.
Message ID <1274953806-5316-1-git-send-email-sheng@linux.intel.com>
Download mbox | patch
Permalink /patch/53712/
State New
Headers show

Comments

Sheng Yang - May 27, 2010, 9:50 a.m.
We can support it in KVM now. The initial values are the minimal requirement
of XSAVE capable processor.

Signed-off-by: Sheng Yang <sheng@linux.intel.com>
---
 target-i386/cpuid.c |   32 ++++++++++++++++++++++++++++++++
 1 files changed, 32 insertions(+), 0 deletions(-)
Avi Kivity - May 27, 2010, 12:56 p.m.
On 05/27/2010 12:50 PM, Sheng Yang wrote:
> We can support it in KVM now. The initial values are the minimal requirement
> of XSAVE capable processor.
>
> Signed-off-by: Sheng Yang<sheng@linux.intel.com>
> ---
>   target-i386/cpuid.c |   32 ++++++++++++++++++++++++++++++++
>   1 files changed, 32 insertions(+), 0 deletions(-)
>
> diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c
> index eebf038..cbf5595 100644
> --- a/target-i386/cpuid.c
> +++ b/target-i386/cpuid.c
> @@ -1067,6 +1067,38 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
>           *ecx = 0;
>           *edx = 0;
>           break;
> +    case 0xD:
> +        /* Processor Extended State */
> +        if (!(env->cpuid_ext_features&  CPUID_EXT_XSAVE)) {
> +            *eax = 0;
> +            *ebx = 0;
> +            *ecx = 0;
> +            *edx = 0;
> +            break;
> +        }
> +        if (count == 0) {
> +            *eax = 0x7; /* FP | SSE | YMM */
> +            *ebx = 0x340; /* FP + SSE + YMM size */
> +            *ecx = 0x340; /* FP + SSE + YMM size */
>    

For -cpu host, we should pick these from KVM_GET_SUPPORTED_CPUID.  For 
canned cpu types (e.g. qemu64), we need to return what we always did.

We can also add a new cpu type that has them built in (there's no cpu on 
the market with avx, right?)

> +            *edx = 0;
> +        } else if (count == 1) {
> +            /* eax = 1, so we can continue with others */
> +            *eax = 1;
> +            *ebx = 0;
> +            *ecx = 0;
> +            *edx = 0;
> +        } else if (count == 2) {
> +            *eax = 0x100; /* YMM size */
> +            *ebx = 0x240; /* YMM offset */
> +            *ecx = 0;
> +            *edx = 0;
>    

These, too.

> +        } else {
> +            *eax = 0;
> +            *ebx = 0;
> +            *ecx = 0;
> +            *edx = 0;
> +        }
> +        break;
>       case 0x80000000:
>           *eax = env->cpuid_xlevel;
>           *ebx = env->cpuid_vendor1;
>
Sheng Yang - May 27, 2010, 1:55 p.m.
On Thursday 27 May 2010 20:56:17 Avi Kivity wrote:
> On 05/27/2010 12:50 PM, Sheng Yang wrote:
> > We can support it in KVM now. The initial values are the minimal
> > requirement of XSAVE capable processor.
> > 
> > Signed-off-by: Sheng Yang<sheng@linux.intel.com>
> > ---
> > 
> >   target-i386/cpuid.c |   32 ++++++++++++++++++++++++++++++++
> >   1 files changed, 32 insertions(+), 0 deletions(-)
> > 
> > diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c
> > index eebf038..cbf5595 100644
> > --- a/target-i386/cpuid.c
> > +++ b/target-i386/cpuid.c
> > @@ -1067,6 +1067,38 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t
> > index, uint32_t count,
> > 
> >           *ecx = 0;
> >           *edx = 0;
> >           break;
> > 
> > +    case 0xD:
> > +        /* Processor Extended State */
> > +        if (!(env->cpuid_ext_features&  CPUID_EXT_XSAVE)) {
> > +            *eax = 0;
> > +            *ebx = 0;
> > +            *ecx = 0;
> > +            *edx = 0;
> > +            break;
> > +        }
> > +        if (count == 0) {
> > +            *eax = 0x7; /* FP | SSE | YMM */
> > +            *ebx = 0x340; /* FP + SSE + YMM size */
> > +            *ecx = 0x340; /* FP + SSE + YMM size */
> 
> For -cpu host, we should pick these from KVM_GET_SUPPORTED_CPUID.  For
> canned cpu types (e.g. qemu64), we need to return what we always did.

Yes, I also prefer this way. didn't do this because it's somehow out of current 
QEmu CPUID setting mechanism.
> 
> We can also add a new cpu type that has them built in (there's no cpu on
> the market with avx, right?)

Right... Let's use -cpu host now.

> 
> > +            *edx = 0;
> > +        } else if (count == 1) {
> > +            /* eax = 1, so we can continue with others */
> > +            *eax = 1;
> > +            *ebx = 0;
> > +            *ecx = 0;
> > +            *edx = 0;
> > +        } else if (count == 2) {
> > +            *eax = 0x100; /* YMM size */
> > +            *ebx = 0x240; /* YMM offset */
> > +            *ecx = 0;
> > +            *edx = 0;
> 
> These, too.

Sure.

--
regards
Yang, Sheng

> 
> > +        } else {
> > +            *eax = 0;
> > +            *ebx = 0;
> > +            *ecx = 0;
> > +            *edx = 0;
> > +        }
> > +        break;
> > 
> >       case 0x80000000:
> >           *eax = env->cpuid_xlevel;
> >           *ebx = env->cpuid_vendor1;

Patch

diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c
index eebf038..cbf5595 100644
--- a/target-i386/cpuid.c
+++ b/target-i386/cpuid.c
@@ -1067,6 +1067,38 @@  void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
         *ecx = 0;
         *edx = 0;
         break;
+    case 0xD:
+        /* Processor Extended State */
+        if (!(env->cpuid_ext_features & CPUID_EXT_XSAVE)) {
+            *eax = 0;
+            *ebx = 0;
+            *ecx = 0;
+            *edx = 0;
+            break;
+        }
+        if (count == 0) {
+            *eax = 0x7; /* FP | SSE | YMM */
+            *ebx = 0x340; /* FP + SSE + YMM size */
+            *ecx = 0x340; /* FP + SSE + YMM size */
+            *edx = 0;
+        } else if (count == 1) {
+            /* eax = 1, so we can continue with others */
+            *eax = 1;
+            *ebx = 0;
+            *ecx = 0;
+            *edx = 0;
+        } else if (count == 2) {
+            *eax = 0x100; /* YMM size */
+            *ebx = 0x240; /* YMM offset */
+            *ecx = 0;
+            *edx = 0;
+        } else {
+            *eax = 0;
+            *ebx = 0;
+            *ecx = 0;
+            *edx = 0;
+        }
+        break;
     case 0x80000000:
         *eax = env->cpuid_xlevel;
         *ebx = env->cpuid_vendor1;