From patchwork Mon Oct 26 21:32:40 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olliver Schinagl X-Patchwork-Id: 536309 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 32824140549 for ; Tue, 27 Oct 2015 08:34:58 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932072AbbJZVed (ORCPT ); Mon, 26 Oct 2015 17:34:33 -0400 Received: from 7of9.schinagl.nl ([88.159.158.68]:33361 "EHLO 7of9.schinagl.nl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752804AbbJZVc6 (ORCPT ); Mon, 26 Oct 2015 17:32:58 -0400 Received: from um-mba-140.are-b.org. (unknown [10.2.0.189]) by 7of9.schinagl.nl (Postfix) with ESMTPA id 4E5314466A; Mon, 26 Oct 2015 22:32:54 +0100 (CET) From: Olliver Schinagl To: Olliver Schinagl , Thierry Reding , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Joachim Eastwood , Maxime Ripard , Alexandre Belloni Cc: Olliver Schinagl , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 09/10] pwm: pwm_gpio: add pulse option Date: Mon, 26 Oct 2015 22:32:40 +0100 Message-Id: <1445895161-2317-10-git-send-email-o.schinagl@ultimaker.com> X-Mailer: git-send-email 2.6.1 In-Reply-To: <1445895161-2317-1-git-send-email-o.schinagl@ultimaker.com> References: <1445895161-2317-1-git-send-email-o.schinagl@ultimaker.com> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org From: Olliver Schinagl With the newly added pwm_pulse option added to the PWM framework, this patch adds the pulse functionality to the gpio_pwm driver. Signed-off-by: Olliver Schinagl --- drivers/pwm/pwm-gpio.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/pwm/pwm-gpio.c b/drivers/pwm/pwm-gpio.c index cf4b170..24c27b1 100644 --- a/drivers/pwm/pwm-gpio.c +++ b/drivers/pwm/pwm-gpio.c @@ -40,6 +40,8 @@ struct gpio_pwm_data { bool pin_on; int on_time; int off_time; + unsigned int count; + bool pulse; bool run; }; @@ -80,6 +82,16 @@ enum hrtimer_restart gpio_pwm_timer(struct hrtimer *timer) gpio_data->pin_on = false; } + if (gpio_data->count > 0) + gpio_data->count--; + if (!gpio_data->count && gpio_data->pulse) { + struct pwm_device *pwm = container_of((void *)gpio_data, + struct pwm_device, + chip_data); + pwm_pulse_done(pwm); + return HRTIMER_NORESTART; + } + return HRTIMER_RESTART; } @@ -88,6 +100,10 @@ static int gpio_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, { struct gpio_pwm_data *gpio_data = pwm_get_chip_data(pwm); + /* A full pulse is both the on and off time, and since counting each + * iteration of the timer is easy and clean, we need double the count. + */ + gpio_data->count = count * 2; gpio_data->on_time = duty_ns; gpio_data->off_time = period_ns - duty_ns; @@ -111,6 +127,9 @@ static int gpio_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) if (gpio_data->run) return -EBUSY; + if (pwm->pulse_count) + gpio_data->pulse = true; + gpio_data->count = pwm->pulse_count; gpio_data->run = true; if (gpio_data->off_time) { hrtimer_start(&gpio_data->timer, ktime_set(0, 0), @@ -130,6 +149,7 @@ static void gpio_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) struct gpio_pwm_data *gpio_data = pwm_get_chip_data(pwm); gpio_data->run = false; + gpio_data->pulse = false; if (!gpio_data->off_time) gpio_pwm_off(gpio_data); } @@ -196,6 +216,8 @@ static int gpio_pwm_probe(struct platform_device *pdev) gpio_data->timer.function = &gpio_pwm_timer; gpio_data->gpiod = gpiod; gpio_data->pin_on = false; + gpio_data->count = 0; + gpio_data->pulse = false; gpio_data->run = false; if (hrtimer_is_hres_active(&gpio_data->timer))