From patchwork Mon May 24 16:19:37 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nathan Froyd X-Patchwork-Id: 53439 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id C3CC5B6ED0 for ; Tue, 25 May 2010 02:22:28 +1000 (EST) Received: from localhost ([127.0.0.1]:58113 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OGaPr-0002Aa-4i for incoming@patchwork.ozlabs.org; Mon, 24 May 2010 12:22:11 -0400 Received: from [140.186.70.92] (port=49927 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OGaNi-0001yA-6x for qemu-devel@nongnu.org; Mon, 24 May 2010 12:20:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OGaNX-00014m-QG for qemu-devel@nongnu.org; Mon, 24 May 2010 12:19:56 -0400 Received: from mail.codesourcery.com ([38.113.113.100]:33401) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OGaNW-000135-BW for qemu-devel@nongnu.org; Mon, 24 May 2010 12:19:46 -0400 Received: (qmail 27896 invoked from network); 24 May 2010 16:19:45 -0000 Received: from unknown (HELO localhost) (froydnj@127.0.0.2) by mail.codesourcery.com with ESMTPA; 24 May 2010 16:19:45 -0000 From: Nathan Froyd To: qemu-devel@nongnu.org Date: Mon, 24 May 2010 09:19:37 -0700 Message-Id: <1274717984-25887-4-git-send-email-froydnj@codesourcery.com> X-Mailer: git-send-email 1.6.3.2 In-Reply-To: <1274717984-25887-1-git-send-email-froydnj@codesourcery.com> References: <1274717984-25887-1-git-send-email-froydnj@codesourcery.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 03/10] target-mips: add enum constants for various invocations of FOP X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Tweak gen_farith and its caller to use them. Signed-off-by: Nathan Froyd --- target-mips/translate.c | 266 ++++++++++++++++++++++++++++++++--------------- 1 files changed, 180 insertions(+), 86 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index 2075d09..2568e16 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -5714,6 +5714,100 @@ static void gen_compute_branch1 (CPUState *env, DisasContext *ctx, uint32_t op, #define FOP(func, fmt) (((fmt) << 21) | (func)) +enum { + OPC_ADD_S = FOP(0, FMT_S), + OPC_SUB_S = FOP(1, FMT_S), + OPC_MUL_S = FOP(2, FMT_S), + OPC_DIV_S = FOP(3, FMT_S), + OPC_SQRT_S = FOP(4, FMT_S), + OPC_ABS_S = FOP(5, FMT_S), + OPC_MOV_S = FOP(6, FMT_S), + OPC_NEG_S = FOP(7, FMT_S), + OPC_ROUND_L_S = FOP(8, FMT_S), + OPC_TRUNC_L_S = FOP(9, FMT_S), + OPC_CEIL_L_S = FOP(10, FMT_S), + OPC_FLOOR_L_S = FOP(11, FMT_S), + OPC_ROUND_W_S = FOP(12, FMT_S), + OPC_TRUNC_W_S = FOP(13, FMT_S), + OPC_CEIL_W_S = FOP(14, FMT_S), + OPC_FLOOR_W_S = FOP(15, FMT_S), + OPC_MOVCF_S = FOP(17, FMT_S), + OPC_MOVZ_S = FOP(18, FMT_S), + OPC_MOVN_S = FOP(19, FMT_S), + OPC_RECIP_S = FOP(21, FMT_S), + OPC_RSQRT_S = FOP(22, FMT_S), + OPC_RECIP2_S = FOP(28, FMT_S), + OPC_RECIP1_S = FOP(29, FMT_S), + OPC_RSQRT1_S = FOP(30, FMT_S), + OPC_RSQRT2_S = FOP(31, FMT_S), + OPC_CVT_D_S = FOP(33, FMT_S), + OPC_CVT_W_S = FOP(36, FMT_S), + OPC_CVT_L_S = FOP(37, FMT_S), + OPC_CVT_PS_S = FOP(38, FMT_S), + /* FOP(48..63, FMT_S) used for comparisons */ + OPC_ADD_D = FOP(0, FMT_D), + OPC_SUB_D = FOP(1, FMT_D), + OPC_MUL_D = FOP(2, FMT_D), + OPC_DIV_D = FOP(3, FMT_D), + OPC_SQRT_D = FOP(4, FMT_D), + OPC_ABS_D = FOP(5, FMT_D), + OPC_MOV_D = FOP(6, FMT_D), + OPC_NEG_D = FOP(7, FMT_D), + OPC_ROUND_L_D = FOP(8, FMT_D), + OPC_TRUNC_L_D = FOP(9, FMT_D), + OPC_CEIL_L_D = FOP(10, FMT_D), + OPC_FLOOR_L_D = FOP(11, FMT_D), + OPC_ROUND_W_D = FOP(12, FMT_D), + OPC_TRUNC_W_D = FOP(13, FMT_D), + OPC_CEIL_W_D = FOP(14, FMT_D), + OPC_FLOOR_W_D = FOP(15, FMT_D), + OPC_MOVCF_D = FOP(17, FMT_D), + OPC_MOVZ_D = FOP(18, FMT_D), + OPC_MOVN_D = FOP(19, FMT_D), + OPC_RECIP_D = FOP(21, FMT_D), + OPC_RSQRT_D = FOP(22, FMT_D), + OPC_RECIP2_D = FOP(28, FMT_D), + OPC_RECIP1_D = FOP(29, FMT_D), + OPC_RSQRT1_D = FOP(30, FMT_D), + OPC_RSQRT2_D = FOP(31, FMT_D), + OPC_CVT_S_D = FOP(32, FMT_D), + OPC_CVT_W_D = FOP(36, FMT_D), + OPC_CVT_L_D = FOP(37, FMT_D), + /* FOP(48..63, FMT_D) used for comparisons */ + + OPC_CVT_S_W = FOP(32, FMT_W), + OPC_CVT_D_W = FOP(33, FMT_W), + OPC_CVT_S_L = FOP(32, FMT_L), + OPC_CVT_D_L = FOP(33, FMT_L), + OPC_CVT_PS_PW = FOP(38, FMT_W), + + OPC_ADD_PS = FOP(0, FMT_PS), + OPC_SUB_PS = FOP(1, FMT_PS), + OPC_MUL_PS = FOP(2, FMT_PS), + OPC_DIV_PS = FOP(3, FMT_PS), + OPC_ABS_PS = FOP(5, FMT_PS), + OPC_MOV_PS = FOP(6, FMT_PS), + OPC_NEG_PS = FOP(7, FMT_PS), + OPC_MOVCF_PS = FOP(17, FMT_PS), + OPC_MOVZ_PS = FOP(18, FMT_PS), + OPC_MOVN_PS = FOP(19, FMT_PS), + OPC_ADDR_PS = FOP(24, FMT_PS), + OPC_MULR_PS = FOP(26, FMT_PS), + OPC_RECIP2_PS = FOP(28, FMT_PS), + OPC_RECIP1_PS = FOP(29, FMT_PS), + OPC_RSQRT1_PS = FOP(30, FMT_PS), + OPC_RSQRT2_PS = FOP(31, FMT_PS), + + OPC_CVT_S_PU = FOP(32, FMT_PS), + OPC_CVT_PW_PS = FOP(36, FMT_PS), + OPC_CVT_S_PL = FOP(40, FMT_PS), + OPC_PLL_PS = FOP(44, FMT_PS), + OPC_PLU_PS = FOP(45, FMT_PS), + OPC_PUL_PS = FOP(46, FMT_PS), + OPC_PUU_PS = FOP(47, FMT_PS), + /* FOP(48..63, FMT_PS) used for comparisons */ +}; + static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs) { const char *opn = "cp1 move"; @@ -5937,8 +6031,8 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, enum { BINOP, CMPOP, OTHEROP } optype = OTHEROP; uint32_t func = ctx->opcode & 0x3f; - switch (ctx->opcode & FOP(0x3f, 0x1f)) { - case FOP(0, 16): + switch (opc) { + case OPC_ADD_S: { TCGv_i32 fp0 = tcg_temp_new_i32(); TCGv_i32 fp1 = tcg_temp_new_i32(); @@ -5953,7 +6047,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, opn = "add.s"; optype = BINOP; break; - case FOP(1, 16): + case OPC_SUB_S: { TCGv_i32 fp0 = tcg_temp_new_i32(); TCGv_i32 fp1 = tcg_temp_new_i32(); @@ -5968,7 +6062,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, opn = "sub.s"; optype = BINOP; break; - case FOP(2, 16): + case OPC_MUL_S: { TCGv_i32 fp0 = tcg_temp_new_i32(); TCGv_i32 fp1 = tcg_temp_new_i32(); @@ -5983,7 +6077,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, opn = "mul.s"; optype = BINOP; break; - case FOP(3, 16): + case OPC_DIV_S: { TCGv_i32 fp0 = tcg_temp_new_i32(); TCGv_i32 fp1 = tcg_temp_new_i32(); @@ -5998,7 +6092,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, opn = "div.s"; optype = BINOP; break; - case FOP(4, 16): + case OPC_SQRT_S: { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6009,7 +6103,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "sqrt.s"; break; - case FOP(5, 16): + case OPC_ABS_S: { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6020,7 +6114,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "abs.s"; break; - case FOP(6, 16): + case OPC_MOV_S: { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6030,7 +6124,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "mov.s"; break; - case FOP(7, 16): + case OPC_NEG_S: { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6041,7 +6135,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "neg.s"; break; - case FOP(8, 16): + case OPC_ROUND_L_S: check_cp1_64bitmode(ctx); { TCGv_i32 fp32 = tcg_temp_new_i32(); @@ -6055,7 +6149,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "round.l.s"; break; - case FOP(9, 16): + case OPC_TRUNC_L_S: check_cp1_64bitmode(ctx); { TCGv_i32 fp32 = tcg_temp_new_i32(); @@ -6069,7 +6163,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "trunc.l.s"; break; - case FOP(10, 16): + case OPC_CEIL_L_S: check_cp1_64bitmode(ctx); { TCGv_i32 fp32 = tcg_temp_new_i32(); @@ -6083,7 +6177,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "ceil.l.s"; break; - case FOP(11, 16): + case OPC_FLOOR_L_S: check_cp1_64bitmode(ctx); { TCGv_i32 fp32 = tcg_temp_new_i32(); @@ -6097,7 +6191,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "floor.l.s"; break; - case FOP(12, 16): + case OPC_ROUND_W_S: { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6108,7 +6202,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "round.w.s"; break; - case FOP(13, 16): + case OPC_TRUNC_W_S: { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6119,7 +6213,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "trunc.w.s"; break; - case FOP(14, 16): + case OPC_CEIL_W_S: { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6130,7 +6224,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "ceil.w.s"; break; - case FOP(15, 16): + case OPC_FLOOR_W_S: { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6141,11 +6235,11 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "floor.w.s"; break; - case FOP(17, 16): + case OPC_MOVCF_S: gen_movcf_s(fs, fd, (ft >> 2) & 0x7, ft & 0x1); opn = "movcf.s"; break; - case FOP(18, 16): + case OPC_MOVZ_S: { int l1 = gen_new_label(); TCGv_i32 fp0; @@ -6161,7 +6255,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "movz.s"; break; - case FOP(19, 16): + case OPC_MOVN_S: { int l1 = gen_new_label(); TCGv_i32 fp0; @@ -6177,7 +6271,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "movn.s"; break; - case FOP(21, 16): + case OPC_RECIP_S: check_cop1x(ctx); { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6189,7 +6283,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "recip.s"; break; - case FOP(22, 16): + case OPC_RSQRT_S: check_cop1x(ctx); { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6201,7 +6295,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "rsqrt.s"; break; - case FOP(28, 16): + case OPC_RECIP2_S: check_cp1_64bitmode(ctx); { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6216,7 +6310,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "recip2.s"; break; - case FOP(29, 16): + case OPC_RECIP1_S: check_cp1_64bitmode(ctx); { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6228,7 +6322,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "recip1.s"; break; - case FOP(30, 16): + case OPC_RSQRT1_S: check_cp1_64bitmode(ctx); { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6240,7 +6334,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "rsqrt1.s"; break; - case FOP(31, 16): + case OPC_RSQRT2_S: check_cp1_64bitmode(ctx); { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6255,7 +6349,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "rsqrt2.s"; break; - case FOP(33, 16): + case OPC_CVT_D_S: check_cp1_registers(ctx, fd); { TCGv_i32 fp32 = tcg_temp_new_i32(); @@ -6269,7 +6363,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "cvt.d.s"; break; - case FOP(36, 16): + case OPC_CVT_W_S: { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6280,7 +6374,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "cvt.w.s"; break; - case FOP(37, 16): + case OPC_CVT_L_S: check_cp1_64bitmode(ctx); { TCGv_i32 fp32 = tcg_temp_new_i32(); @@ -6294,7 +6388,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "cvt.l.s"; break; - case FOP(38, 16): + case OPC_CVT_PS_S: check_cp1_64bitmode(ctx); { TCGv_i64 fp64 = tcg_temp_new_i64(); @@ -6345,7 +6439,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, tcg_temp_free_i32(fp1); } break; - case FOP(0, 17): + case OPC_ADD_D: check_cp1_registers(ctx, fs | ft | fd); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6361,7 +6455,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, opn = "add.d"; optype = BINOP; break; - case FOP(1, 17): + case OPC_SUB_D: check_cp1_registers(ctx, fs | ft | fd); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6377,7 +6471,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, opn = "sub.d"; optype = BINOP; break; - case FOP(2, 17): + case OPC_MUL_D: check_cp1_registers(ctx, fs | ft | fd); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6393,7 +6487,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, opn = "mul.d"; optype = BINOP; break; - case FOP(3, 17): + case OPC_DIV_D: check_cp1_registers(ctx, fs | ft | fd); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6409,7 +6503,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, opn = "div.d"; optype = BINOP; break; - case FOP(4, 17): + case OPC_SQRT_D: check_cp1_registers(ctx, fs | fd); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6421,7 +6515,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "sqrt.d"; break; - case FOP(5, 17): + case OPC_ABS_D: check_cp1_registers(ctx, fs | fd); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6433,7 +6527,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "abs.d"; break; - case FOP(6, 17): + case OPC_MOV_D: check_cp1_registers(ctx, fs | fd); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6444,7 +6538,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "mov.d"; break; - case FOP(7, 17): + case OPC_NEG_D: check_cp1_registers(ctx, fs | fd); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6456,7 +6550,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "neg.d"; break; - case FOP(8, 17): + case OPC_ROUND_L_D: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6468,7 +6562,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "round.l.d"; break; - case FOP(9, 17): + case OPC_TRUNC_L_D: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6480,7 +6574,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "trunc.l.d"; break; - case FOP(10, 17): + case OPC_CEIL_L_D: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6492,7 +6586,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "ceil.l.d"; break; - case FOP(11, 17): + case OPC_FLOOR_L_D: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6504,7 +6598,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "floor.l.d"; break; - case FOP(12, 17): + case OPC_ROUND_W_D: check_cp1_registers(ctx, fs); { TCGv_i32 fp32 = tcg_temp_new_i32(); @@ -6518,7 +6612,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "round.w.d"; break; - case FOP(13, 17): + case OPC_TRUNC_W_D: check_cp1_registers(ctx, fs); { TCGv_i32 fp32 = tcg_temp_new_i32(); @@ -6532,7 +6626,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "trunc.w.d"; break; - case FOP(14, 17): + case OPC_CEIL_W_D: check_cp1_registers(ctx, fs); { TCGv_i32 fp32 = tcg_temp_new_i32(); @@ -6546,7 +6640,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "ceil.w.d"; break; - case FOP(15, 17): + case OPC_FLOOR_W_D: check_cp1_registers(ctx, fs); { TCGv_i32 fp32 = tcg_temp_new_i32(); @@ -6560,11 +6654,11 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "floor.w.d"; break; - case FOP(17, 17): + case OPC_MOVCF_D: gen_movcf_d(ctx, fs, fd, (ft >> 2) & 0x7, ft & 0x1); opn = "movcf.d"; break; - case FOP(18, 17): + case OPC_MOVZ_D: { int l1 = gen_new_label(); TCGv_i64 fp0; @@ -6580,7 +6674,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "movz.d"; break; - case FOP(19, 17): + case OPC_MOVN_D: { int l1 = gen_new_label(); TCGv_i64 fp0; @@ -6596,7 +6690,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "movn.d"; break; - case FOP(21, 17): + case OPC_RECIP_D: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6608,7 +6702,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "recip.d"; break; - case FOP(22, 17): + case OPC_RSQRT_D: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6620,7 +6714,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "rsqrt.d"; break; - case FOP(28, 17): + case OPC_RECIP2_D: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6635,7 +6729,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "recip2.d"; break; - case FOP(29, 17): + case OPC_RECIP1_D: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6647,7 +6741,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "recip1.d"; break; - case FOP(30, 17): + case OPC_RSQRT1_D: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6659,7 +6753,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "rsqrt1.d"; break; - case FOP(31, 17): + case OPC_RSQRT2_D: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6710,7 +6804,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, tcg_temp_free_i64(fp1); } break; - case FOP(32, 17): + case OPC_CVT_S_D: check_cp1_registers(ctx, fs); { TCGv_i32 fp32 = tcg_temp_new_i32(); @@ -6724,7 +6818,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "cvt.s.d"; break; - case FOP(36, 17): + case OPC_CVT_W_D: check_cp1_registers(ctx, fs); { TCGv_i32 fp32 = tcg_temp_new_i32(); @@ -6738,7 +6832,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "cvt.w.d"; break; - case FOP(37, 17): + case OPC_CVT_L_D: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6750,7 +6844,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "cvt.l.d"; break; - case FOP(32, 20): + case OPC_CVT_S_W: { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -6761,7 +6855,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "cvt.s.w"; break; - case FOP(33, 20): + case OPC_CVT_D_W: check_cp1_registers(ctx, fd); { TCGv_i32 fp32 = tcg_temp_new_i32(); @@ -6775,7 +6869,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "cvt.d.w"; break; - case FOP(32, 21): + case OPC_CVT_S_L: check_cp1_64bitmode(ctx); { TCGv_i32 fp32 = tcg_temp_new_i32(); @@ -6789,7 +6883,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "cvt.s.l"; break; - case FOP(33, 21): + case OPC_CVT_D_L: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6801,7 +6895,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "cvt.d.l"; break; - case FOP(38, 20): + case OPC_CVT_PS_PW: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6813,7 +6907,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "cvt.ps.pw"; break; - case FOP(0, 22): + case OPC_ADD_PS: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6828,7 +6922,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "add.ps"; break; - case FOP(1, 22): + case OPC_SUB_PS: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6843,7 +6937,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "sub.ps"; break; - case FOP(2, 22): + case OPC_MUL_PS: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6858,7 +6952,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "mul.ps"; break; - case FOP(5, 22): + case OPC_ABS_PS: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6870,7 +6964,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "abs.ps"; break; - case FOP(6, 22): + case OPC_MOV_PS: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6881,7 +6975,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "mov.ps"; break; - case FOP(7, 22): + case OPC_NEG_PS: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6893,12 +6987,12 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "neg.ps"; break; - case FOP(17, 22): + case OPC_MOVCF_PS: check_cp1_64bitmode(ctx); gen_movcf_ps(fs, fd, (ft >> 2) & 0x7, ft & 0x1); opn = "movcf.ps"; break; - case FOP(18, 22): + case OPC_MOVZ_PS: check_cp1_64bitmode(ctx); { int l1 = gen_new_label(); @@ -6914,7 +7008,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "movz.ps"; break; - case FOP(19, 22): + case OPC_MOVN_PS: check_cp1_64bitmode(ctx); { int l1 = gen_new_label(); @@ -6931,7 +7025,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "movn.ps"; break; - case FOP(24, 22): + case OPC_ADDR_PS: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6946,7 +7040,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "addr.ps"; break; - case FOP(26, 22): + case OPC_MULR_PS: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6961,7 +7055,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "mulr.ps"; break; - case FOP(28, 22): + case OPC_RECIP2_PS: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6976,7 +7070,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "recip2.ps"; break; - case FOP(29, 22): + case OPC_RECIP1_PS: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -6988,7 +7082,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "recip1.ps"; break; - case FOP(30, 22): + case OPC_RSQRT1_PS: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -7000,7 +7094,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "rsqrt1.ps"; break; - case FOP(31, 22): + case OPC_RSQRT2_PS: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -7015,7 +7109,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "rsqrt2.ps"; break; - case FOP(32, 22): + case OPC_CVT_S_PU: check_cp1_64bitmode(ctx); { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -7027,7 +7121,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "cvt.s.pu"; break; - case FOP(36, 22): + case OPC_CVT_PW_PS: check_cp1_64bitmode(ctx); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -7039,7 +7133,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "cvt.pw.ps"; break; - case FOP(40, 22): + case OPC_CVT_S_PL: check_cp1_64bitmode(ctx); { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -7051,7 +7145,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "cvt.s.pl"; break; - case FOP(44, 22): + case OPC_PLL_PS: check_cp1_64bitmode(ctx); { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -7066,7 +7160,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "pll.ps"; break; - case FOP(45, 22): + case OPC_PLU_PS: check_cp1_64bitmode(ctx); { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -7081,7 +7175,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "plu.ps"; break; - case FOP(46, 22): + case OPC_PUL_PS: check_cp1_64bitmode(ctx); { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -7096,7 +7190,7 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, } opn = "pul.ps"; break; - case FOP(47, 22): + case OPC_PUU_PS: check_cp1_64bitmode(ctx); { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -9298,7 +9392,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx, int *is_branch) case OPC_W_FMT: case OPC_L_FMT: case OPC_PS_FMT: - gen_farith(ctx, MASK_CP1_FUNC(ctx->opcode), rt, rd, sa, + gen_farith(ctx, ctx->opcode & FOP(0x3f, 0x1f), rt, rd, sa, (imm >> 8) & 0x7); break; default: