[1/3] NPTL/ARCv2: Implement full memory barrier for NPTL

Submitted by Vineet Gupta on Oct. 21, 2015, 7:12 a.m.

Details

Message ID 1445411545-14538-2-git-send-email-vgupta@synopsys.com
State New
Headers show

Commit Message

Vineet Gupta Oct. 21, 2015, 7:12 a.m.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
 libc/sysdeps/linux/arc/bits/atomic.h | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

Patch hide | download patch | download mbox

diff --git a/libc/sysdeps/linux/arc/bits/atomic.h b/libc/sysdeps/linux/arc/bits/atomic.h
index d4abf4eb7896..1fdc83f70f6b 100644
--- a/libc/sysdeps/linux/arc/bits/atomic.h
+++ b/libc/sysdeps/linux/arc/bits/atomic.h
@@ -24,8 +24,11 @@  typedef uintmax_t uatomic_max_t;
 
 void __arc_link_error (void);
 
-#define atomic_full_barrier() \
-     __asm__ __volatile__("": : :"memory")
+#ifdef __A7__
+#define atomic_full_barrier() __asm__ __volatile__("": : :"memory")
+#else
+#define atomic_full_barrier() __asm__ __volatile__("dmb 3": : :"memory")
+#endif
 
 /* Atomic compare and exchange. */