| Message ID | 1445371953-9627-4-git-send-email-aneesh.kumar@linux.vnet.ibm.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Michael Ellerman |
| Headers | show |
diff --git a/arch/powerpc/include/asm/nohash/64/pgtable-64k.h b/arch/powerpc/include/asm/nohash/64/pgtable-64k.h index 1d8e26e8167b..dbd9de9264c2 100644 --- a/arch/powerpc/include/asm/nohash/64/pgtable-64k.h +++ b/arch/powerpc/include/asm/nohash/64/pgtable-64k.h @@ -10,14 +10,14 @@ #define PGD_INDEX_SIZE 12 /* - * we support 8 fragments per PTE page of 64K size + * we support 32 fragments per PTE page of 64K size */ -#define PTE_FRAG_NR 8 +#define PTE_FRAG_NR 32 /* * We use a 2K PTE page fragment and another 4K for storing * real_pte_t hash index. Rounding the entire thing to 8K */ -#define PTE_FRAG_SIZE_SHIFT 13 +#define PTE_FRAG_SIZE_SHIFT 11 #define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
They don't need to track 4k subpage slot details and hence don't need second half of pgtable_t. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> --- arch/powerpc/include/asm/nohash/64/pgtable-64k.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)