diff mbox

[AArch64] Distinct costs for sign and zero extension

Message ID 56257859.5090109@samsung.com
State New
Headers show

Commit Message

Evandro Menezes Oct. 19, 2015, 11:10 p.m. UTC
Some micro-architectures may favor one of sign or zero extension over 
the other in the base plus extended register offset addressing mode.

This patch separates the member "register_extend" of the structure 
"cpu_addrcost_table" into two, one for sign and the other zero extension.

Please, commit if it's alright.

Thank you,

Comments

Andrew Pinski Oct. 19, 2015, 11:52 p.m. UTC | #1
On Tue, Oct 20, 2015 at 7:10 AM, Evandro Menezes <e.menezes@samsung.com> wrote:
> Some micro-architectures may favor one of sign or zero extension over the
> other in the base plus extended register offset addressing mode.

Yes I was going to create the same patch as ThunderX is one of those
micro-architectures.

Thanks,
Andrew

>
> This patch separates the member "register_extend" of the structure
> "cpu_addrcost_table" into two, one for sign and the other zero extension.
>
> Please, commit if it's alright.
>
> Thank you,
>
> --
> Evandro Menezes
>
James Greenhalgh Oct. 27, 2015, noon UTC | #2
On Tue, Oct 20, 2015 at 07:52:45AM +0800, Andrew Pinski wrote:
> On Tue, Oct 20, 2015 at 7:10 AM, Evandro Menezes <e.menezes@samsung.com> wrote:
> > Some micro-architectures may favor one of sign or zero extension over the
> > other in the base plus extended register offset addressing mode.
> 
> Yes I was going to create the same patch as ThunderX is one of those
> micro-architectures.

OK (Though the patch would have looked better had all the in-tree examples
not be no-op splits!).

I've committed this as r229431 on your behalf. Please provide full ChangeLog
entries with the patch submission, I derived the Name/Email fields and
committed this:

2015-10-27  Evandro Menezes  <e.menezes@samsung.com>

	* config/aarch64/aarch64-protos.h (cpu_addrcost_table): Split member
	for register extension into sign and zero register extension.
	* config/aarch64/aarch64.c (generic_addrcost_table): Infer values
	for sign and zero register extension.
	(cortexa57_addrcost_table): Likewise.
	(xgene1_addrcost_table): Likewise.

Thanks,
James

> >
> > This patch separates the member "register_extend" of the structure
> > "cpu_addrcost_table" into two, one for sign and the other zero extension.
> >
> > Please, commit if it's alright.
> >
> > Thank you,
> >
> > --
> > Evandro Menezes
> >
>
diff mbox

Patch

From 2efc8994abfbab65d04009fa1c0a8900804c23bb Mon Sep 17 00:00:00 2001
From: Evandro Menezes <e.menezes@samsung.com>
Date: Tue, 8 Sep 2015 15:15:56 -0500
Subject: [PATCH] [AArch64] Distinct costs for sign and zero extension

gcc/
	* config/aarch64/aarch64.c (generic_addrcost_table,
	cortexa57_addrcost_table, xgene1_addrcost_table): Infer values for sign
	and zero register extension.
	* config/aarch64/aarch64-protos.h (cpu_addrcost_table): Split member
	for register extension into sign and zero register extension.
---
 gcc/config/aarch64/aarch64-protos.h |  3 ++-
 gcc/config/aarch64/aarch64.c        | 16 +++++++++++-----
 2 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
index baaf1bd..3c46222 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -134,7 +134,8 @@  struct cpu_addrcost_table
   const int pre_modify;
   const int post_modify;
   const int register_offset;
-  const int register_extend;
+  const int register_sextend;
+  const int register_zextend;
   const int imm_offset;
 };
 
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index aba5b56..47dbe74 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -190,7 +190,8 @@  static const struct cpu_addrcost_table generic_addrcost_table =
   0, /* pre_modify  */
   0, /* post_modify  */
   0, /* register_offset  */
-  0, /* register_extend  */
+  0, /* register_sextend  */
+  0, /* register_zextend  */
   0 /* imm_offset  */
 };
 
@@ -205,7 +206,8 @@  static const struct cpu_addrcost_table cortexa57_addrcost_table =
   0, /* pre_modify  */
   0, /* post_modify  */
   0, /* register_offset  */
-  0, /* register_extend  */
+  0, /* register_sextend  */
+  0, /* register_zextend  */
   0, /* imm_offset  */
 };
 
@@ -220,7 +222,8 @@  static const struct cpu_addrcost_table xgene1_addrcost_table =
   1, /* pre_modify  */
   0, /* post_modify  */
   0, /* register_offset  */
-  1, /* register_extend  */
+  1, /* register_sextend  */
+  1, /* register_zextend  */
   0, /* imm_offset  */
 };
 
@@ -5508,9 +5511,12 @@  aarch64_address_cost (rtx x,
 	cost += addr_cost->register_offset;
 	break;
 
-      case ADDRESS_REG_UXTW:
       case ADDRESS_REG_SXTW:
-	cost += addr_cost->register_extend;
+	cost += addr_cost->register_sextend;
+	break;
+
+      case ADDRESS_REG_UXTW:
+	cost += addr_cost->register_zextend;
 	break;
 
       default:
-- 
2.1.0.243.g30d45f7