| Message ID | 1274517536-20889-1-git-send-email-atar4qemu@gmail.com |
|---|---|
| State | New |
| Headers | show |
Thanks, applied. You forgot SoB-line, I copied it from the previous version. On Sat, May 22, 2010 at 8:38 AM, Artyom Tarasenko <atar4qemu@googlemail.com> wrote: > On a real hardware changing read-only bits has no effect > Use a mask common for SCSI and Ethernet registers. The crucial > bit is DMA_INTR, because setting or clearing it may produce > spurious interrupts. > > This patch allows booting Solaris 2.3 > --- > hw/sparc32_dma.c | 12 ++++++++---- > 1 files changed, 8 insertions(+), 4 deletions(-) > > diff --git a/hw/sparc32_dma.c b/hw/sparc32_dma.c > index 3ceb851..b521707 100644 > --- a/hw/sparc32_dma.c > +++ b/hw/sparc32_dma.c > @@ -62,6 +62,9 @@ > #define DMA_DRAIN_FIFO 0x40 > #define DMA_RESET 0x80 > > +/* XXX SCSI and ethernet should have different read-only bit masks */ > +#define DMA_CSR_RO_MASK 0xfe000007 > + > typedef struct DMAState DMAState; > > struct DMAState { > @@ -187,7 +190,7 @@ static void dma_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) > switch (saddr) { > case 0: > if (val & DMA_INTREN) { > - if (val & DMA_INTR) { > + if (s->dmaregs[0] & DMA_INTR) { > DPRINTF("Raise IRQ\n"); > qemu_irq_raise(s->irq); > } > @@ -204,16 +207,17 @@ static void dma_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) > val &= ~DMA_DRAIN_FIFO; > } else if (val == 0) > val = DMA_DRAIN_FIFO; > - val &= 0x0fffffff; > + val &= ~DMA_CSR_RO_MASK; > val |= DMA_VER; > + s->dmaregs[0] = (s->dmaregs[0] & DMA_CSR_RO_MASK) | val; > break; > case 1: > s->dmaregs[0] |= DMA_LOADED; > - break; > + /* fall through */ > default: > + s->dmaregs[saddr] = val; > break; > } > - s->dmaregs[saddr] = val; > } > > static CPUReadMemoryFunc * const dma_mem_read[3] = { > -- > 1.6.2.5 > >
2010/5/22 Blue Swirl <blauwirbel@gmail.com>: > Thanks, applied. You forgot SoB-line, I copied it from the previous version. Sorry. Btw, is there a way to tell 'format-patch' to always include it? Can't find it in the git docs. Otherwise I'll define an alias so I won't need to remember about the '-s' switch. > On Sat, May 22, 2010 at 8:38 AM, Artyom Tarasenko > <atar4qemu@googlemail.com> wrote: >> On a real hardware changing read-only bits has no effect >> Use a mask common for SCSI and Ethernet registers. The crucial >> bit is DMA_INTR, because setting or clearing it may produce >> spurious interrupts. >> >> This patch allows booting Solaris 2.3 >> --- >> hw/sparc32_dma.c | 12 ++++++++---- >> 1 files changed, 8 insertions(+), 4 deletions(-) >> >> diff --git a/hw/sparc32_dma.c b/hw/sparc32_dma.c >> index 3ceb851..b521707 100644 >> --- a/hw/sparc32_dma.c >> +++ b/hw/sparc32_dma.c >> @@ -62,6 +62,9 @@ >> #define DMA_DRAIN_FIFO 0x40 >> #define DMA_RESET 0x80 >> >> +/* XXX SCSI and ethernet should have different read-only bit masks */ >> +#define DMA_CSR_RO_MASK 0xfe000007 >> + >> typedef struct DMAState DMAState; >> >> struct DMAState { >> @@ -187,7 +190,7 @@ static void dma_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) >> switch (saddr) { >> case 0: >> if (val & DMA_INTREN) { >> - if (val & DMA_INTR) { >> + if (s->dmaregs[0] & DMA_INTR) { >> DPRINTF("Raise IRQ\n"); >> qemu_irq_raise(s->irq); >> } >> @@ -204,16 +207,17 @@ static void dma_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) >> val &= ~DMA_DRAIN_FIFO; >> } else if (val == 0) >> val = DMA_DRAIN_FIFO; >> - val &= 0x0fffffff; >> + val &= ~DMA_CSR_RO_MASK; >> val |= DMA_VER; >> + s->dmaregs[0] = (s->dmaregs[0] & DMA_CSR_RO_MASK) | val; >> break; >> case 1: >> s->dmaregs[0] |= DMA_LOADED; >> - break; >> + /* fall through */ >> default: >> + s->dmaregs[saddr] = val; >> break; >> } >> - s->dmaregs[saddr] = val; >> } >> >> static CPUReadMemoryFunc * const dma_mem_read[3] = { >> -- >> 1.6.2.5 >> >> >
On Sat, May 22, 2010 at 9:29 AM, Artyom Tarasenko <atar4qemu@googlemail.com> wrote: > 2010/5/22 Blue Swirl <blauwirbel@gmail.com>: >> Thanks, applied. You forgot SoB-line, I copied it from the previous version. > > Sorry. Btw, is there a way to tell 'format-patch' to always include it? > Can't find it in the git docs. Otherwise I'll define an alias so I won't > need to remember about the '-s' switch. [format] thread = true signoff = true Though format.thread (adds reference headers to the messages, so patches reference the cover letter) does not seem to work with git 1.6.2.4. >> On Sat, May 22, 2010 at 8:38 AM, Artyom Tarasenko >> <atar4qemu@googlemail.com> wrote: >>> On a real hardware changing read-only bits has no effect >>> Use a mask common for SCSI and Ethernet registers. The crucial >>> bit is DMA_INTR, because setting or clearing it may produce >>> spurious interrupts. >>> >>> This patch allows booting Solaris 2.3 >>> --- >>> hw/sparc32_dma.c | 12 ++++++++---- >>> 1 files changed, 8 insertions(+), 4 deletions(-) >>> >>> diff --git a/hw/sparc32_dma.c b/hw/sparc32_dma.c >>> index 3ceb851..b521707 100644 >>> --- a/hw/sparc32_dma.c >>> +++ b/hw/sparc32_dma.c >>> @@ -62,6 +62,9 @@ >>> #define DMA_DRAIN_FIFO 0x40 >>> #define DMA_RESET 0x80 >>> >>> +/* XXX SCSI and ethernet should have different read-only bit masks */ >>> +#define DMA_CSR_RO_MASK 0xfe000007 >>> + >>> typedef struct DMAState DMAState; >>> >>> struct DMAState { >>> @@ -187,7 +190,7 @@ static void dma_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) >>> switch (saddr) { >>> case 0: >>> if (val & DMA_INTREN) { >>> - if (val & DMA_INTR) { >>> + if (s->dmaregs[0] & DMA_INTR) { >>> DPRINTF("Raise IRQ\n"); >>> qemu_irq_raise(s->irq); >>> } >>> @@ -204,16 +207,17 @@ static void dma_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) >>> val &= ~DMA_DRAIN_FIFO; >>> } else if (val == 0) >>> val = DMA_DRAIN_FIFO; >>> - val &= 0x0fffffff; >>> + val &= ~DMA_CSR_RO_MASK; >>> val |= DMA_VER; >>> + s->dmaregs[0] = (s->dmaregs[0] & DMA_CSR_RO_MASK) | val; >>> break; >>> case 1: >>> s->dmaregs[0] |= DMA_LOADED; >>> - break; >>> + /* fall through */ >>> default: >>> + s->dmaregs[saddr] = val; >>> break; >>> } >>> - s->dmaregs[saddr] = val; >>> } >>> >>> static CPUReadMemoryFunc * const dma_mem_read[3] = { >>> -- >>> 1.6.2.5 >>> >>> >> > > > > -- > Regards, > Artyom Tarasenko > > solaris/sparc under qemu blog: http://tyom.blogspot.com/ >
diff --git a/hw/sparc32_dma.c b/hw/sparc32_dma.c index 3ceb851..b521707 100644 --- a/hw/sparc32_dma.c +++ b/hw/sparc32_dma.c @@ -62,6 +62,9 @@ #define DMA_DRAIN_FIFO 0x40 #define DMA_RESET 0x80 +/* XXX SCSI and ethernet should have different read-only bit masks */ +#define DMA_CSR_RO_MASK 0xfe000007 + typedef struct DMAState DMAState; struct DMAState { @@ -187,7 +190,7 @@ static void dma_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) switch (saddr) { case 0: if (val & DMA_INTREN) { - if (val & DMA_INTR) { + if (s->dmaregs[0] & DMA_INTR) { DPRINTF("Raise IRQ\n"); qemu_irq_raise(s->irq); } @@ -204,16 +207,17 @@ static void dma_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) val &= ~DMA_DRAIN_FIFO; } else if (val == 0) val = DMA_DRAIN_FIFO; - val &= 0x0fffffff; + val &= ~DMA_CSR_RO_MASK; val |= DMA_VER; + s->dmaregs[0] = (s->dmaregs[0] & DMA_CSR_RO_MASK) | val; break; case 1: s->dmaregs[0] |= DMA_LOADED; - break; + /* fall through */ default: + s->dmaregs[saddr] = val; break; } - s->dmaregs[saddr] = val; } static CPUReadMemoryFunc * const dma_mem_read[3] = {