From patchwork Fri May 21 15:30:35 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 53180 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 7A64DB7D1F for ; Sat, 22 May 2010 02:01:59 +1000 (EST) Received: from localhost ([127.0.0.1]:56311 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OFUfb-0006oa-FN for incoming@patchwork.ozlabs.org; Fri, 21 May 2010 12:01:55 -0400 Received: from [140.186.70.92] (port=53232 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OFUBo-00013z-Qk for qemu-devel@nongnu.org; Fri, 21 May 2010 11:31:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OFUBe-0003OX-Tf for qemu-devel@nongnu.org; Fri, 21 May 2010 11:31:08 -0400 Received: from are.twiddle.net ([75.149.56.221]:52891) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OFUBe-0003OA-66 for qemu-devel@nongnu.org; Fri, 21 May 2010 11:30:58 -0400 Received: from anchor.twiddle.home (anchor.twiddle.home [172.31.0.4]) by are.twiddle.net (Postfix) with ESMTPS id A81C4F1E; Fri, 21 May 2010 08:30:57 -0700 (PDT) Received: from anchor.twiddle.home (anchor.twiddle.home [127.0.0.1]) by anchor.twiddle.home (8.14.4/8.14.4) with ESMTP id o4LFUv22018090; Fri, 21 May 2010 08:30:57 -0700 Received: (from rth@localhost) by anchor.twiddle.home (8.14.4/8.14.4/Submit) id o4LFUuUB018089; Fri, 21 May 2010 08:30:56 -0700 From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 21 May 2010 08:30:35 -0700 Message-Id: X-Mailer: git-send-email 1.7.0.1 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 15/15] tcg-i386: Nuke trailing whitespace. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c | 52 ++++++++++++++++++++++++------------------------ 1 files changed, 26 insertions(+), 26 deletions(-) diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index fc61e80..396a2f1 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -50,7 +50,7 @@ static const int tcg_target_call_oarg_regs[2] = { TCG_REG_EAX, TCG_REG_EDX }; static uint8_t *tb_ret_addr; -static void patch_reloc(uint8_t *code_ptr, int type, +static void patch_reloc(uint8_t *code_ptr, int type, tcg_target_long value, tcg_target_long addend) { value += addend; @@ -273,7 +273,7 @@ static inline void tcg_out_modrm(TCGContext *s, int opc, int r, int rm) tcg_out8(s, 0xc0 | (r << 3) | rm); } -/* Output an opcode with a full "rm + (index<labels[label_index]; - + if (l->has_value) { val = l->u.value - (tcg_target_long)s->code_ptr; val1 = val - 2; @@ -733,8 +733,8 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, r1 = TCG_REG_EDX; #if defined(CONFIG_SOFTMMU) - tcg_out_mov(s, r1, addr_reg); - tcg_out_mov(s, r0, addr_reg); + tcg_out_mov(s, r1, addr_reg); + tcg_out_mov(s, r0, addr_reg); tcg_out_shifti(s, SHIFT_SHR, r1, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); @@ -747,9 +747,9 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, /* cmp 0(r1), r0 */ tcg_out_modrm_offset(s, OPC_CMP_GvEv, r0, r1, 0); - + tcg_out_mov(s, r0, addr_reg); - + #if TARGET_LONG_BITS == 32 /* je label1 */ tcg_out8(s, OPC_JCC_short + JCC_JE); @@ -760,7 +760,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, tcg_out8(s, OPC_JCC_short + JCC_JNE); label3_ptr = s->code_ptr; s->code_ptr++; - + /* cmp 4(r1), addr_reg2 */ tcg_out_modrm_offset(s, OPC_CMP_GvEv, addr_reg2, r1, 4); @@ -768,7 +768,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, tcg_out8(s, OPC_JCC_short + JCC_JE); label1_ptr = s->code_ptr; s->code_ptr++; - + /* label3: */ *label3_ptr = s->code_ptr - label3_ptr - 1; #endif @@ -815,13 +815,13 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, tcg_out8(s, OPC_JMP_short); label2_ptr = s->code_ptr; s->code_ptr++; - + /* label1: */ *label1_ptr = s->code_ptr - label1_ptr - 1; /* add x(r1), r0 */ tcg_out_modrm_offset(s, OPC_ADD_GvEv, r0, r1, - offsetof(CPUTLBEntry, addend) - + offsetof(CPUTLBEntry, addend) - offsetof(CPUTLBEntry, addr_read)); #else r0 = addr_reg; @@ -925,9 +925,9 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, r1 = TCG_REG_EDX; #if defined(CONFIG_SOFTMMU) - tcg_out_mov(s, r1, addr_reg); - tcg_out_mov(s, r0, addr_reg); - + tcg_out_mov(s, r1, addr_reg); + tcg_out_mov(s, r0, addr_reg); + tcg_out_shifti(s, SHIFT_SHR, r1, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); tgen_arithi(s, ARITH_AND, r0, TARGET_PAGE_MASK | ((1 << s_bits) - 1), 0); @@ -939,9 +939,9 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, /* cmp 0(r1), r0 */ tcg_out_modrm_offset(s, OPC_CMP_GvEv, r0, r1, 0); - + tcg_out_mov(s, r0, addr_reg); - + #if TARGET_LONG_BITS == 32 /* je label1 */ tcg_out8(s, OPC_JCC_short + JCC_JE); @@ -952,7 +952,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, tcg_out8(s, OPC_JCC_short + JCC_JNE); label3_ptr = s->code_ptr; s->code_ptr++; - + /* cmp 4(r1), addr_reg2 */ tcg_out_modrm_offset(s, OPC_CMP_GvEv, addr_reg2, r1, 4); @@ -960,7 +960,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, tcg_out8(s, OPC_JCC_short + JCC_JE); label1_ptr = s->code_ptr; s->code_ptr++; - + /* label3: */ *label3_ptr = s->code_ptr - label3_ptr - 1; #endif @@ -1025,13 +1025,13 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, tcg_out8(s, OPC_JMP_short); label2_ptr = s->code_ptr; s->code_ptr++; - + /* label1: */ *label1_ptr = s->code_ptr - label1_ptr - 1; /* add x(r1), r0 */ tcg_out_modrm_offset(s, OPC_ADD_GvEv, r0, r1, - offsetof(CPUTLBEntry, addend) - + offsetof(CPUTLBEntry, addend) - offsetof(CPUTLBEntry, addr_write)); #else r0 = addr_reg; @@ -1091,7 +1091,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, const int *const_args) { int c; - + switch(opc) { case INDEX_op_exit_tb: tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EAX, args[0]); @@ -1334,7 +1334,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_qemu_ld64: tcg_out_qemu_ld(s, args, 3); break; - + case INDEX_op_qemu_st8: tcg_out_qemu_st(s, args, 0); break; @@ -1447,7 +1447,7 @@ static int tcg_target_callee_save_regs[] = { void tcg_target_qemu_prologue(TCGContext *s) { int i, frame_size, push_size, stack_addend; - + /* TB prologue */ /* save all callee saved registers */ for(i = 0; i < ARRAY_SIZE(tcg_target_callee_save_regs); i++) { @@ -1456,13 +1456,13 @@ void tcg_target_qemu_prologue(TCGContext *s) /* reserve some stack space */ push_size = 4 + ARRAY_SIZE(tcg_target_callee_save_regs) * 4; frame_size = push_size + TCG_STATIC_CALL_ARGS_SIZE; - frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) & + frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) & ~(TCG_TARGET_STACK_ALIGN - 1); stack_addend = frame_size - push_size; tcg_out_addi(s, TCG_REG_ESP, -stack_addend); tcg_out_modrm(s, OPC_GRP5, EXT5_JMPN_Ev, TCG_REG_EAX); /* jmp *%eax */ - + /* TB epilogue */ tb_ret_addr = s->code_ptr; tcg_out_addi(s, TCG_REG_ESP, stack_addend);