Message ID | 1445088758-2797-1-git-send-email-clsee@altera.com |
---|---|
State | Accepted |
Delegated to: | Marek Vasut |
Headers | show |
On Saturday, October 17, 2015 at 03:32:38 PM, Chin Liang See wrote: > Ensure the intended SCLK frequency not exceeding the maximum > frequency. If that happen, SCLK will set to maximum frequency. > > Signed-off-by: Chin Liang See <clsee@altera.com> > Cc: Dinh Nguyen <dinguyen@opensource.altera.com> > Cc: Dinh Nguyen <dinh.linux@gmail.com> > Cc: Marek Vasut <marex@denx.de> > Cc: Stefan Roese <sr@denx.de> > Cc: Vikas Manocha <vikas.manocha@st.com> > Cc: Jagannadh Teki <jteki@openedev.com> > Cc: Pavel Machek <pavel@denx.de> > Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Marek Vasut <marex@denx.de> Best regards, Marek Vasut
On Sat, 2015-10-17 at 16:14 +0200, marex@denx.de wrote: > On Saturday, October 17, 2015 at 03:32:38 PM, Chin Liang See wrote: > > Ensure the intended SCLK frequency not exceeding the maximum > > frequency. If that happen, SCLK will set to maximum frequency. > > > > Signed-off-by: Chin Liang See <clsee@altera.com> > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com> > > Cc: Dinh Nguyen <dinh.linux@gmail.com> > > Cc: Marek Vasut <marex@denx.de> > > Cc: Stefan Roese <sr@denx.de> > > Cc: Vikas Manocha <vikas.manocha@st.com> > > Cc: Jagannadh Teki <jteki@openedev.com> > > Cc: Pavel Machek <pavel@denx.de> > > Acked-by: Pavel Machek <pavel@denx.de> > > Acked-by: Marek Vasut <marex@denx.de> > Thanks Marek for the review. I noticed these patches yet to be applied. Wonder you able to apply these? Thanks Chin Liang > Best regards, > Marek Vasut
On Wednesday, November 04, 2015 at 03:51:56 PM, Chin Liang See wrote: > On Sat, 2015-10-17 at 16:14 +0200, marex@denx.de wrote: > > On Saturday, October 17, 2015 at 03:32:38 PM, Chin Liang See wrote: > > > Ensure the intended SCLK frequency not exceeding the maximum > > > frequency. If that happen, SCLK will set to maximum frequency. > > > > > > Signed-off-by: Chin Liang See <clsee@altera.com> > > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com> > > > Cc: Dinh Nguyen <dinh.linux@gmail.com> > > > Cc: Marek Vasut <marex@denx.de> > > > Cc: Stefan Roese <sr@denx.de> > > > Cc: Vikas Manocha <vikas.manocha@st.com> > > > Cc: Jagannadh Teki <jteki@openedev.com> > > > Cc: Pavel Machek <pavel@denx.de> > > > Acked-by: Pavel Machek <pavel@denx.de> > > > > Acked-by: Marek Vasut <marex@denx.de> > > Thanks Marek for the review. > > I noticed these patches yet to be applied. > Wonder you able to apply these? Sorry about that, applied all five, thanks! Best regards, Marek Vasut
On Thu, 2015-11-05 at 02:34 +0100, marex@denx.de wrote: > On Wednesday, November 04, 2015 at 03:51:56 PM, Chin Liang See wrote: > > On Sat, 2015-10-17 at 16:14 +0200, marex@denx.de wrote: > > > On Saturday, October 17, 2015 at 03:32:38 PM, Chin Liang See wrote: > > > > Ensure the intended SCLK frequency not exceeding the maximum > > > > frequency. If that happen, SCLK will set to maximum frequency. > > > > > > > > Signed-off-by: Chin Liang See <clsee@altera.com> > > > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com> > > > > Cc: Dinh Nguyen <dinh.linux@gmail.com> > > > > Cc: Marek Vasut <marex@denx.de> > > > > Cc: Stefan Roese <sr@denx.de> > > > > Cc: Vikas Manocha <vikas.manocha@st.com> > > > > Cc: Jagannadh Teki <jteki@openedev.com> > > > > Cc: Pavel Machek <pavel@denx.de> > > > > Acked-by: Pavel Machek <pavel@denx.de> > > > > > > Acked-by: Marek Vasut <marex@denx.de> > > > > Thanks Marek for the review. > > > > I noticed these patches yet to be applied. > > Wonder you able to apply these? > > Sorry about that, applied all five, thanks! No worries, thanks Marek! Thanks Chin Liang > > Best regards, > Marek Vasut
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 5756178..4f7fd52 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -122,6 +122,9 @@ static int cadence_spi_set_speed(struct udevice *bus, uint hz) struct cadence_spi_priv *priv = dev_get_priv(bus); int err; + if (hz > plat->max_hz) + hz = plat->max_hz; + /* Disable QSPI */ cadence_qspi_apb_controller_disable(priv->regbase);