Message ID | 1444911181-21696-5-git-send-email-B48286@freescale.com |
---|---|
State | Superseded |
Headers | show |
On 10/15, Zhiqiang Hou wrote: > From: Hou Zhiqiang <B48286@freescale.com> > > Signed-off-by: Hou Zhiqiang <B48286@freescale.com> > --- > This patch has been acked in V3 by Stephen Boyd [sboyd@codeaurora.org]. Yes, please add it into the patches that you send instead of putting it below the --- line.
> -----Original Message----- > From: Stephen Boyd [mailto:sboyd@codeaurora.org] > Sent: 2015年10月16日 2:02 > To: Hou Zhiqiang-B48286 > Cc: linux-arm-kernel@lists.infradead.org; catalin.marinas@arm.com; > will.deacon@arm.com; linux-i2c@vger.kernel.org; linux- > watchdog@vger.kernel.org; linux-doc@vger.kernel.org; linux- > clk@vger.kernel.org; mark.rutland@arm.com; linux@roeck-us.net; wsa@the- > dreams.de; wim@iguana.be; corbet@lwn.net; mturquette@baylibre.com; Hu > Mingkai-B21284; Xie Shaohui-B21989; Wood Scott-B07421; Sharma Bhupesh- > B45370; Song Wenbin-B53747 > Subject: Re: [PATCH V4 5/6] clk: qoriq: Add ls1043a support. > > On 10/15, Zhiqiang Hou wrote: > > From: Hou Zhiqiang <B48286@freescale.com> > > > > Signed-off-by: Hou Zhiqiang <B48286@freescale.com> > > --- > > This patch has been acked in V3 by Stephen Boyd [sboyd@codeaurora.org]. > > Yes, please add it into the patches that you send instead of putting it > below the --- line. Ok, thanks. Zhiqiang
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index 8f9c93b..b189688 100644 --- a/drivers/clk/clk-qoriq.c +++ b/drivers/clk/clk-qoriq.c @@ -244,6 +244,28 @@ static const struct clockgen_muxinfo clockgen2_cmux_cgb = { }, }; +static const struct clockgen_muxinfo ls1043a_hwa1 = { + { + {}, + {}, + { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 }, + { CLKSEL_VALID, CGA_PLL1, PLL_DIV3 }, + {}, + {}, + { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 }, + { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 }, + }, +}; + +static const struct clockgen_muxinfo ls1043a_hwa2 = { + { + {}, + { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 }, + {}, + { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 }, + }, +}; + static const struct clockgen_muxinfo t1023_hwa1 = { { {}, @@ -452,6 +474,21 @@ static const struct clockgen_chipinfo chipinfo[] = { .pll_mask = 0x03, }, { + .compat = "fsl,ls1043a-clockgen", + .init_periph = t2080_init_periph, + .cmux_groups = { + &t1040_cmux + }, + .hwaccel = { + &ls1043a_hwa1, &ls1043a_hwa2 + }, + .cmux_to_group = { + 0, -1 + }, + .pll_mask = 0x07, + .flags = CG_PLL_8BIT, + }, + { .compat = "fsl,ls2080a-clockgen", .cmux_groups = { &clockgen2_cmux_cga12, &clockgen2_cmux_cgb @@ -1227,6 +1264,7 @@ err: CLK_OF_DECLARE(qoriq_clockgen_1, "fsl,qoriq-clockgen-1.0", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init); +CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init); /* Legacy nodes */