From patchwork Thu May 20 10:00:04 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= X-Patchwork-Id: 53056 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B6DFEB7D43 for ; Thu, 20 May 2010 20:01:15 +1000 (EST) Received: from localhost ([127.0.0.1]:34900 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OF2Yx-0007KU-TO for incoming@patchwork.ozlabs.org; Thu, 20 May 2010 06:01:11 -0400 Received: from [140.186.70.92] (port=50503 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OF2Y5-0007KP-Jp for qemu-devel@nongnu.org; Thu, 20 May 2010 06:00:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OF2Xz-00085O-45 for qemu-devel@nongnu.org; Thu, 20 May 2010 06:00:17 -0400 Received: from mx1.redhat.com ([209.132.183.28]:57493) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OF2Xy-00085E-SH for qemu-devel@nongnu.org; Thu, 20 May 2010 06:00:11 -0400 Received: from int-mx05.intmail.prod.int.phx2.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.18]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id o4KA09vx023146 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Thu, 20 May 2010 06:00:09 -0400 Received: from localhost.localdomain (dhcp-1-192.lcy.redhat.com [10.32.224.192]) by int-mx05.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id o4KA051I018537; Thu, 20 May 2010 06:00:07 -0400 From: "Daniel P. Berrange" To: qemu-devel@nongnu.org Date: Thu, 20 May 2010 11:00:04 +0100 Message-Id: <1274349604-22595-1-git-send-email-berrange@redhat.com> X-Scanned-By: MIMEDefang 2.67 on 10.5.11.18 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. Cc: Subject: [Qemu-devel] [PATCH] Name the default PCI bus "pci.0" on all architectures (v2) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The system emulators for each arch are using inconsistent naming for the default PCI bus "pci" vs "pci.0". Since it is conceivable we'll have multiple PCI buses in the future standardize on "pci.0" for all architectures. This ensures mgmt apps can rely on a name when assigning PCI devices an address on the bus using eg '-device e1000,bus=pci.0,addr=3' Signed-off-by: Daniel P. Berrange --- hw/apb_pci.c | 2 +- hw/grackle_pci.c | 2 +- hw/gt64xxx.c | 2 +- hw/ppc4xx_pci.c | 2 +- hw/ppce500_pci.c | 2 +- hw/prep_pci.c | 2 +- hw/sh_pci.c | 2 +- hw/unin_pci.c | 4 ++-- hw/versatile_pci.c | 2 +- 9 files changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/apb_pci.c b/hw/apb_pci.c index 65d8ba6..841d0bc 100644 --- a/hw/apb_pci.c +++ b/hw/apb_pci.c @@ -338,7 +338,7 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base, /* mem_data */ sysbus_mmio_map(s, 3, mem_base); d = FROM_SYSBUS(APBState, s); - d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci", + d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci.0", pci_apb_set_irq, pci_pbm_map_irq, d, 0, 32); pci_bus_set_mem_base(d->host_state.bus, mem_base); diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c index aa0c51b..8444a35 100644 --- a/hw/grackle_pci.c +++ b/hw/grackle_pci.c @@ -88,7 +88,7 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic) qdev_init_nofail(dev); s = sysbus_from_qdev(dev); d = FROM_SYSBUS(GrackleState, s); - d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci", + d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci.0", pci_grackle_set_irq, pci_grackle_map_irq, pic, 0, 4); diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c index 55971b9..756e1bf 100644 --- a/hw/gt64xxx.c +++ b/hw/gt64xxx.c @@ -1113,7 +1113,7 @@ PCIBus *pci_gt64120_init(qemu_irq *pic) s = qemu_mallocz(sizeof(GT64120State)); s->pci = qemu_mallocz(sizeof(GT64120PCIState)); - s->pci->bus = pci_register_bus(NULL, "pci", + s->pci->bus = pci_register_bus(NULL, "pci.0", pci_gt64120_set_irq, pci_gt64120_map_irq, pic, 144, 4); s->ISD_handle = cpu_register_io_memory(gt64120_read, gt64120_write, s); diff --git a/hw/ppc4xx_pci.c b/hw/ppc4xx_pci.c index c9e3279..dc1d2f8 100644 --- a/hw/ppc4xx_pci.c +++ b/hw/ppc4xx_pci.c @@ -357,7 +357,7 @@ PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq pci_irqs[4], controller = qemu_mallocz(sizeof(PPC4xxPCIState)); - controller->pci_state.bus = pci_register_bus(NULL, "pci", + controller->pci_state.bus = pci_register_bus(NULL, "pci.0", ppc4xx_pci_set_irq, ppc4xx_pci_map_irq, pci_irqs, 0, 4); diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c index 336d284..fa4387a 100644 --- a/hw/ppce500_pci.c +++ b/hw/ppce500_pci.c @@ -276,7 +276,7 @@ PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], target_phys_addr_t registers) controller = qemu_mallocz(sizeof(PPCE500PCIState)); - controller->pci_state.bus = pci_register_bus(NULL, "pci", + controller->pci_state.bus = pci_register_bus(NULL, "pci.0", mpc85xx_pci_set_irq, mpc85xx_pci_map_irq, pci_irqs, 0x88, 4); diff --git a/hw/prep_pci.c b/hw/prep_pci.c index 144fde0..7ea7ca5 100644 --- a/hw/prep_pci.c +++ b/hw/prep_pci.c @@ -117,7 +117,7 @@ PCIBus *pci_prep_init(qemu_irq *pic) int PPC_io_memory; s = qemu_mallocz(sizeof(PREPPCIState)); - s->bus = pci_register_bus(NULL, "pci", + s->bus = pci_register_bus(NULL, "pci.0", prep_set_irq, prep_map_irq, pic, 0, 4); pci_host_conf_register_ioport(0xcf8, s); diff --git a/hw/sh_pci.c b/hw/sh_pci.c index cc2f190..0e138ed 100644 --- a/hw/sh_pci.c +++ b/hw/sh_pci.c @@ -98,7 +98,7 @@ PCIBus *sh_pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, int reg; p = qemu_mallocz(sizeof(SHPCIC)); - p->bus = pci_register_bus(NULL, "pci", + p->bus = pci_register_bus(NULL, "pci.0", set_irq, map_irq, opaque, devfn_min, nirq); p->dev = pci_register_device(p->bus, "SH PCIC", sizeof(PCIDevice), diff --git a/hw/unin_pci.c b/hw/unin_pci.c index f0a773d..57c56e0 100644 --- a/hw/unin_pci.c +++ b/hw/unin_pci.c @@ -226,7 +226,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic) qdev_init_nofail(dev); s = sysbus_from_qdev(dev); d = FROM_SYSBUS(UNINState, s); - d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci", + d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci.0", pci_unin_set_irq, pci_unin_map_irq, pic, 11 << 3, 4); @@ -278,7 +278,7 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic) s = sysbus_from_qdev(dev); d = FROM_SYSBUS(UNINState, s); - d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci", + d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci.0", pci_unin_set_irq, pci_unin_map_irq, pic, 11 << 3, 4); diff --git a/hw/versatile_pci.c b/hw/versatile_pci.c index 199bc19..d0469ff 100644 --- a/hw/versatile_pci.c +++ b/hw/versatile_pci.c @@ -125,7 +125,7 @@ static int pci_vpb_init(SysBusDevice *dev) for (i = 0; i < 4; i++) { sysbus_init_irq(dev, &s->irq[i]); } - bus = pci_register_bus(&dev->qdev, "pci", + bus = pci_register_bus(&dev->qdev, "pci.0", pci_vpb_set_irq, pci_vpb_map_irq, s->irq, 11 << 3, 4);