diff mbox

[v7,06/60] sparc/PCI: Keep resource idx order with bridge register number

Message ID 1444340359-8011-7-git-send-email-yinghai@kernel.org
State Superseded
Headers show

Commit Message

Yinghai Lu Oct. 8, 2015, 9:38 p.m. UTC
On one system found strang "no compatible bridge window" warning

PCI: Claiming 0000:00:01.0: Resource 14: 0002000100000000..000200010fffffff [10220c]
PCI: Claiming 0000:01:00.0: Resource 1: 0002000100000000..000200010000ffff [100214]
pci 0000:01:00.0: can't claim BAR 1 [mem 0x2000100000000-0x200010000ffff 64bit]: no compatible bridge window

and we already had pref_compat support that add extra pref bit for device
resource.

It turns out that pci_resource_compatible()/pci_up_path_over_pref_mem64()
just check resource with bridge pref mmio register idx 15, and we have put
resource to use mmio register idx 14 during of_scan_pci_bridge()
as the bridge does not mmio resource.

We already fix pci_up_path_over_pref_mem64() to check all bus resources.

And at the same time, this patch will make resource to consistent sequence
like other arch or directly from pci_read_bridge_bases(),
even non-pref mmio is missing, or out of ordering in firmware reporting.

So hold i = 1 for non pref mmio, and i =2 for pref mmio.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 arch/sparc/kernel/pci.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

Comments

Khalid Aziz Oct. 9, 2015, 4:19 p.m. UTC | #1
On Thu, 2015-10-08 at 14:38 -0700, Yinghai Lu wrote:
> On one system found strang "no compatible bridge window" warning
> 
> PCI: Claiming 0000:00:01.0: Resource 14: 0002000100000000..000200010fffffff [10220c]
> PCI: Claiming 0000:01:00.0: Resource 1: 0002000100000000..000200010000ffff [100214]
> pci 0000:01:00.0: can't claim BAR 1 [mem 0x2000100000000-0x200010000ffff 64bit]: no compatible bridge window
> 
> and we already had pref_compat support that add extra pref bit for device
> resource.
> 
> It turns out that pci_resource_compatible()/pci_up_path_over_pref_mem64()
> just check resource with bridge pref mmio register idx 15, and we have put
> resource to use mmio register idx 14 during of_scan_pci_bridge()
> as the bridge does not mmio resource.
> 
> We already fix pci_up_path_over_pref_mem64() to check all bus resources.
> 
> And at the same time, this patch will make resource to consistent sequence
> like other arch or directly from pci_read_bridge_bases(),
> even non-pref mmio is missing, or out of ordering in firmware reporting.
> 
> So hold i = 1 for non pref mmio, and i =2 for pref mmio.
> 
> Signed-off-by: Yinghai Lu <yinghai@kernel.org>

Tested on sparc platforms

Tested-by: Khalid Aziz <khalid.aziz@oracle.com> 



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diff mbox

Patch

diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index 41dcbc7..4113922 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -472,7 +472,7 @@  static void of_scan_pci_bridge(struct pci_pbm_info *pbm,
 		pci_read_bridge_bases(bus);
 		goto after_ranges;
 	}
-	i = 1;
+	i = 3;
 	for (; len >= 32; len -= 32, ranges += 8) {
 		u64 start;
 
@@ -504,6 +504,12 @@  static void of_scan_pci_bridge(struct pci_pbm_info *pbm,
 				       " for bridge %s\n", node->full_name);
 				continue;
 			}
+		} else if ((flags & IORESOURCE_PREFETCH) &&
+			   !bus->resource[2]->flags) {
+			res = bus->resource[2];
+		} else if (((flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH)) ==
+			    IORESOURCE_MEM) && !bus->resource[1]->flags) {
+			res = bus->resource[1];
 		} else {
 			if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) {
 				printk(KERN_ERR "PCI: too many memory ranges"