PowerPC IEEE 128-bit patch #7 (revised #2)

This is the revised patch #7 for the IEEE 128-bit software floating point
support in the PowerPC. I have tested this on big endian power7 (both 32/64
bit) and little endian power8 with no regressions. Is this ok to install in the
trunk?

This patch should allow __float128 support on VSX systems, but it won't be
usable until patch #8 goes in that adds support in libgcc. It is expected that
we will need to update the glibc sources (which are where the master definition
for the soft-fp directory comes from) to add kf mode support for IEEE 128-bit
floating point. I have intermediate patches that add the support by using sed
to transform the <...>tf<...> names into <...>kf<...>.

At a high level, the changes in this patch are:

1) As we discussed previously, the option name is changed from
-mfloat128-software and -mfloat128-none to be -mfloat128 and -mno-float128.

2) Add defines so that the user can determine if __float128 is available, and
what is the default format for long double.

3) I removed the code I previously had to disallow IFmode/KFmode if -mfloat128
is not enabled.

4) Like other vector types, don't allow pre-increment and pre-decrement memory
forms that reload eventually has to fix up.

5) Add IEEE 128-bit register allocation, and call/return as vector types. In a
few places, I had to modify tests against VECTOR_TYPE_P to use
ALTIVEC_OR_VSX_VECTOR_MODE, since the IEEE 128-bit floating point types aren't
considered a vector type by the machine independent portion of the compiler.

6) Add support for all of the emulator names. In this version of the patch, I
added support for converting between the various decimal types and __float128
(but so far those new emulated functions have not been written). In addition, I
modified the compare function to have 2 variants, __cmpukf2 which is intended
to mimic the behavior of the 'fcmpu' instruction, and __cmpokf2 which is
intended to mimic the behaviour of the 'fcmpo' instruction. At the present
time, I have not written the __cmpokf2 function, and the compiler does not
currently generated 'fcmpo'.

7) I added support for the 'q' and 'Q' suffix for explict __float128 constants.

8) I reordered the tests in MODES_TIEABLE_P so that vector types are tested
before scalar floating point types, so that __float128 pairs with vector
double, but not with long double (if IBM extended double is the long double
format) and __ibm128.

9) I updated the documentation for the new switch and for the __float128 and
__ibm128 keywords.

10) I went through rs6000.md and cloned all of the support for the 128-bit
types, so that you can use the right operation on KFmode for IEEE types, IFmode
for IBM types, and TFmode will be treated as KFmode if -mabi=ieeelongdouble and
IFmode if -mabi=ibmlongdouble.

[gcc]
2015-10-06  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add -mfloat128.

	* config/rs6000/rs6000.opt (-mfloat128): Replace the switches
	-mfloat128-{software,none} with -m{,no-}float128.

	* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Add defines
	to tell users whether __float128 is available, and whether long
	double is IBM extended double or IEEE 128-bit floating point.

	* config/rs6000/rs6000.c (TARGET_C_MODE_FOR_SUFFIX): Define.
	(rs6000_hard_regno_mode_ok): Remove code not allowing 128-bit
	floating types from any register if the appropriate option is not
	used.
	(rs6000_debug_reg_global): Delete -mfloat128-{software,none}
	debugging.
	(rs6000_setup_reg_addr_masks): Don't allow pre-increment or
	pre-decrement on IEEE 128-bit floating point.
	(rs6000_init_hard_regno_mode_ok): Add support for IEEE 128-bit
	floating point types.
	(rs6000_option_override_internal): Replace the switches
	-mfloat128-{software,none} with -m{,no-}float128, and move the
	tests to be closer to other ISA 2.06/2.07 options.
	(rs6000_gen_le_vsx_permute): Add support for IEEE 128-bit floating
	point.
	(init_cumulative_args): Assume that IEEE 128-bit floating point
	emulation routines have prototypes, and don't need to pass the
	arguments in the save area as well as the Altivec register set.
	(rs6000_function_arg): Likewise.
	(rs6000_arg_partial_bytes): Likewise.
	(rs6000_init_builtins): Set up ieee128_float_type_node to always
	use KFmode, and ibm128_float_type_node to always use IFmode.
	(init_float128_ibm): Split rs6000_init_libfuncs into 2 functions,
	one for IEEE 128-bit floating point, and one for IBM extended
	double floating point. For IFmode, use the traditional IBM
	extended double names. For TFmode, if -mabi=ieeelongdouble, use
	the names for KFmode.
	(init_float128_ieee): Likewise.
	(rs6000_init_libfuncs): Likewise.
	(rs6000_generate_compare): For IEEE 128-bit floating point, use
	the compare function that matches the fcmpu instruction.
	(rs6000_expand_float128_convert): Restructure code. Add support
	for using plain move if the underlying type is the same. Deal with
	src and dest being in memory.
	(rs6000_mangle_type): Use U10__float128 for IEEE 128-bit floating
	point.
	(rs6000_scalar_mode_supported_p): Add IFmode if -mfloat128.
	(rs6000_c_mode_for_suffix): Add 'q' and 'Q' suffixes for IEEE
	128-bit floating point.
	(rs6000_opt_masks): Add -mfloat128.
	(struct rs6000_opt_var): Fix typo in comment.
	(chain_contains_only_swaps): Change from VECTOR_MODE_P to
	ALTIVEC_OR_VSX_VECTOR_MODE to add IEEE 128-bit floating point
	values in VSX registers.
	(mark_swaps_for_removal): Likewise.
	(rs6000_analyze_swaps): Likewise.

	* config/rs6000/rs6000.h (ALTIVEC_VECTOR_MODE): Add IEEE 128-bit
	floating point types that go in VSX registers.
	(MODES_TIEABLE_P): Move vector tests above floating point scalar
	tests, so that IEEE 128-bit floating point values in VSX tie with
	other vector types.
	(struct rs6000_args): Add libcall field.

	* config/rs6000/rs6000.md (FP iterator): Allow IEEE 128-bit
	floating point.
	(FLOAT128_SFDFTF iterator): Delete, rework conversion insns.
	(IFKF iterator): Delete, replace with IBM128 iterator. Add
	explicit FLOAT128_IBM_P (<mode>) tests.
	(IBM128 iterator): Likewise.
	(IEEE128 iterator): New iterator for IEEE 128-bit floating point
	support.
	(TFIFKF iterator): Delete, replace with FLOAT128 iterator.
	(FLOAT128 iterator): Likewise.
	(signbit<mode>2): Add IEEE 128-bit floating point support.
	(extenddftf2): 	Rework IEEE 128-bit floating point code. Use
	iterators to make IFmode and KFmode patterns to mirror the TFmode
	patterns. Delete FLOAT128_SFDFTF, IFKF and TFIFKF iterators. Add
	IEEE128, and FLOAT128 iterators.
	(extenddf<mode>2): Likewise.
	(extenddftf2_fprs): Likewise.
	(extenddf<mode>2_fprs): Likewise.
	(extenddf<mode>2_vsx): Likewise.
	(extenddftf2_internal): Likewise.
	(extendsftf2): Likewise.
	(extendsf<mode>2): Likewise.
	(trunctfdf2): Rework 128-bit floating point truncation patterns.
	(trunc<mode>df2): Likewise.
	(trunctfdf2_internal1): Likewise.
	(trunc<mode>df2_internal1): Likewise.
	(trunctfdf2_internal2): Likewise.
	(trunc<mode>df2_internal2): Likewise.
	(trunctfsf2): Likewise.
	(trunc<mode>sf2): Likewise.
	(trunctfsf2_fprs): Likewise.
	(trunc<mode>sf2_fprs): Likewise.
	(floatsitf2): Rework conversion patterns from 32-bit integer types
	to 128-bit floating point.
	(floatsi<mode>2): Likewise.
	(fix_trunc_helper): Rework conversions patterns from 128-bit
	floating point types to integers.
	(fix_trunc_helper<mode>): Likewise.
	(fix_trunctfsi2): Likewise.
	(fix_trunc<mode>si2): Likewise.
	(fix_trunctfsi2_fprs): Likewise.
	(fix_trunc<mode>si2_fprs): Likewise.
	(fix_trunctfsi2_internal): Likewise.
	(fix_trunc<mode>si2_internal): Likewise.
	(fix_trunctfdi2): Likewise.
	(fix_trunc<mode>di2): Likewise.
	(fixuns_trunctf<mode>2): Likewise.
	(fixuns_trunc<IEEE128:mode><SDI:mode>2): Likewise.
	(floatditf2): Rework conversion patterns from 64-bit integer types
	to 128-bit floating point.
	(floatdi<mode>2): Likewise.
	(floatuns<mode>tf2): Likewise.
	(floatuns<IEEE128:mode><SDI:mode>2): Likewise.
	(extend<FLOAT128_SFDFTF:mode><IFKF:mode>2): Rework conversions
	between 128-bit floating point types.
	(extendifkf2): Likewise.
	(trunc<IFKF:mode><FLOAT128_SFDFTF:mode>2): Likewise.
	(extendtfkf2): Likewise.
	(fix_trunc<IFKF:mode><SDI:mode>2): Likewise.
	(extendtfkf2): Likewise.
	(fix_trunc<IFKF:mode><SDI:mode>2): Likewise.
	(trunciftf2): Likewise.
	(fixuns_trunc<IFKF:mode><SDI:mode>2): Likewise.
	(truncifkf2): Likewise.
	(float<SDI:mode><IFKF:mode>2): Likewise.
	(trunckftf2): Likewise.
	(floatuns<SDI:mode><IFKF:mode>2): Likewise.
	(trunctfif2): Likewise.
	(neg<mode>2): Rework IEEE 128-bit floating point negation and
	absolute value.
	(negtf2_internal): Likewise.
	(neg<mode>2_internal): Likewise.
	(abs<mode>2): Likewise.
	(abstf2_internal): Likewise.
	(abs<mode>2_internal): Likewise.
	(ieee_128bit_vsx_neg<mode>2): Likewise.
	(ieee_128bit_vsx_neg<mode>2_internal): Likewise.
	(ieee_128bit_vsx_abs<mode>2): Likewise.
	(ieee_128bit_vsx_abs<mode>2_internal): Likewise.
	(ieee_128bit_vsx_nabs<mode>2): Likewise.
	(ieee_128bit_vsx_nabs<mode>2_internal): Likewise.
	(cmptf_internal1): Add IFmode 128-bit comparison.
	(cmp<mode>_internal1): Likewise.

	* config/rs6000/rs6000-opts.h (enum float128_type_t):
	Delete. Switch from -mfloat128-{none,software} to
	-m{,no-}float128.

	* config/rs6000/predicates.md (reg_or_indexed_operand): Allow
	SUBREG's.

	* doc/extend.texi (additional floating types): Document PowerPC
	use of __float128 and __ibm128 types.

	* doc/invoke.texi (RS/6000 and PowerPC Options): Document
	-mfloat128 and -mno-float128.

[gcc/testsuite]
2015-10-06  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/float128-call.c: New function, test whether
	IEEE 128-bit floating point in VSX registers is passed correctly.

PowerPC IEEE 128-bit patch #7 (revised #2)

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