@@ -11506,6 +11506,41 @@
}"
)
+;; movmisalign patterns for HImode and SImode.
+(define_expand "movmisalign<mode>"
+ [(match_operand:HSI 0 "general_operand")
+ (match_operand:HSI 1 "general_operand")]
+ "unaligned_access"
+{
+ /* This pattern is not permitted to fail during expansion: if both arguments
+ are non-registers (e.g. memory := constant), force operand 1 into a
+ register. */
+ rtx (* gen_unaligned_load)(rtx, rtx);
+ rtx tmp_dest = operands[0];
+ if (!s_register_operand (operands[0], <MODE>mode)
+ && !s_register_operand (operands[1], <MODE>mode))
+ operands[1] = force_reg (<MODE>mode, operands[1]);
+
+ if (<MODE>mode == HImode)
+ {
+ gen_unaligned_load = gen_unaligned_loadhiu;
+ tmp_dest = gen_reg_rtx (SImode);
+ }
+ else
+ gen_unaligned_load = gen_unaligned_loadsi;
+
+ if (MEM_P (operands[1]))
+ {
+ emit_insn (gen_unaligned_load (tmp_dest, operands[1]));
+ if (<MODE>mode == HImode)
+ emit_move_insn (operands[0], gen_lowpart (HImode, tmp_dest));
+ }
+ else
+ emit_insn (gen_unaligned_store<mode> (operands[0], operands[1]));
+
+ DONE;
+})
+
;; Vector bits common to IWMMXT and Neon
(include "vec-common.md")
;; Load the Intel Wireless Multimedia Extension patterns
@@ -33,6 +33,9 @@
;; A list of integer modes that are up to one word long
(define_mode_iterator QHSI [QI HI SI])
+;; A list of integer modes that are half and one word long
+(define_mode_iterator HSI [HI SI])
+
;; A list of integer modes that are less than a word
(define_mode_iterator NARROW [QI HI])
This adds movmisalignhi and movmisalignsi expanders when unaligned access is allowed by the architecture. This allows the mid-end to expand to misaligned loads and stored. Compared code generated for the Linux kernel and it changes code generation for a handful of files all for the better basically by reducing the stack usage. Tested by : 1. armhf bootstrap and regression test - no regressions. 2.. arm-none-eabi cross build and regression test for {-marm/-march=armv7-a/-mfpu=vfpv3-d16/-mfloat-abi=softfp} {-mthumb/-march=armv8-a/-mfpu=crypto-neon-fp-armv8/-mfloat-abi=hard} {-marm/-mcpu=arm7tdmi/-mfloat-abi=soft} {-mthumb/-mcpu=arm7tdmi/-mfloat-abi=soft} Will apply to trunk once 2/2 is approved. regards Ramana 2015-09-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> PR target/67366 * config/arm/arm.md (movmisalign<mode>): New. * config/arm/iterators.md (HSI): New. --- gcc/config/arm/arm.md | 35 +++++++++++++++++++++++++++++++++++ gcc/config/arm/iterators.md | 3 +++ 2 files changed, 38 insertions(+)