| Message ID | 1444290348-66509-1-git-send-email-puck.chen@hisilicon.com |
|---|---|
| State | Under Review, archived |
| Headers | show |
On Thu, Oct 08, 2015 at 03:45:47PM +0800, Chen Feng wrote: > +static int hi6220_smmu_attach_dev(struct iommu_domain *domain, > + struct device *dev) > +{ > + struct hi6220_domain *m_domain = to_hi6220_domain(domain); > + > + smmu_domain_prepare(m_domain); > + dev->archdata.iommu = &m_domain->smmu_dev->iova_allocator; > + > + return 0; > +} What happens when you attach devices behind different smmus to one domain? Will that overwrite the smmu_dev pointer in the domain? > +static size_t hi6220_smmu_unmap(struct iommu_domain *domain, unsigned long iova, > + size_t size) > +{ > + struct hi6220_domain *m_domain = to_hi6220_domain(domain); > + size_t page_size = m_domain->smmu_dev->page_size; > + struct hi6220_smmu *smmu_dev = m_domain->smmu_dev; > + int *page_table = (unsigned int *)smmu_dev->pgtable_virt; > + > + if (size != page_size) { > + pr_err("unmap size error, only support %zd\n", page_size); > + return 0; > + } > + > + __clear_smmu_pte(page_table + IOVA_PFN(iova)); > + > + return page_size; > +} Don't you need a call to __invalid_smmu_tlb here too? Joerg -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 2015/10/14 20:18, Joerg Roedel wrote: > On Thu, Oct 08, 2015 at 03:45:47PM +0800, Chen Feng wrote: >> +static int hi6220_smmu_attach_dev(struct iommu_domain *domain, >> + struct device *dev) >> +{ >> + struct hi6220_domain *m_domain = to_hi6220_domain(domain); >> + >> + smmu_domain_prepare(m_domain); >> + dev->archdata.iommu = &m_domain->smmu_dev->iova_allocator; >> + >> + return 0; >> +} > > What happens when you attach devices behind different smmus to one > domain? Will that overwrite the smmu_dev pointer in the domain? > Since the smmu master use the same pagetable, the master can use the iova_allocator in smmu driver to allocate iova address. In this way, the different master can get the different io address. >> +static size_t hi6220_smmu_unmap(struct iommu_domain *domain, unsigned long iova, >> + size_t size) >> +{ >> + struct hi6220_domain *m_domain = to_hi6220_domain(domain); >> + size_t page_size = m_domain->smmu_dev->page_size; >> + struct hi6220_smmu *smmu_dev = m_domain->smmu_dev; >> + int *page_table = (unsigned int *)smmu_dev->pgtable_virt; >> + >> + if (size != page_size) { >> + pr_err("unmap size error, only support %zd\n", page_size); >> + return 0; >> + } >> + >> + __clear_smmu_pte(page_table + IOVA_PFN(iova)); >> + >> + return page_size; >> +} > > Don't you need a call to __invalid_smmu_tlb here too? Thanks, I will fix this next version. > > > > Joerg > > > . > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt new file mode 100644 index 0000000..32d1156 --- /dev/null +++ b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt @@ -0,0 +1,52 @@ +Hi6220 SoC SMMU Device Driver devicetree document +======================================================================= +The Architecture of SMMU on Hi6220 SoC: + + +------------------------------------------------------------------+ + | | + | +---------+ +--------+ +-------------+ +-------+ | + | | ADE | | ISP | | V/J codec | | G3D | | + | +----|----+ +---|----+ +------|------+ +---|---| | + | | | | | | + | ---------v-----------v--------------v--------------v----- | + | Media Bus | + | --------------------------------|---------------|-------- | + | | | | + | +---v---------------v--------+ | + | | SMMU | | + | +----------|---------|-------+ | + | | | | + +--------------------------------------------|---------|-----------+ + | | + +------------v---------v-----------+ + | DDRC | + +----------------------------------+ + +Note: +The media system shared the same smmu IP. to access DDR memory. And all +media IP used the same page table. + +Below binding describes the system mmu for media system in hi6220 platform + +Required properties: +- compatible: Should be "hisilicon,hi6220-smmu" example: + compatible = "hisilicon,hi6220-smmu"; +- reg: A tuple of base address and size of System MMU registers. +- interrupts: An interrupt specifier for interrupt signal of System MMU. +- clocks: The clock used for smmu IP. +- clock-names: The name to enable clock with clock framework. +- #iommu-cells: The iommu-cells should be 1 for muti-master to use. + +Examples: + smmu@f4210000 { + compatible = "hisilicon,hi6220-smmu"; + reg = <0x0 0xf4210000 0x0 0x1000>; + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&sys_ctrl HI6220_MMU_CLK>, + <&media_ctrl HI6220_MED_MMU>, + <&sys_ctrl HI6220_MEDIA_PLL_SRC>; + clock-names = "smmu_clk", + "media_sc_clk", + "smmu_peri_clk"; + #iommu-cells = <1>; + };