From patchwork Mon Oct 5 09:00:58 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Senthil Kumar Selvaraj X-Patchwork-Id: 526257 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 72FC5140D4D for ; Mon, 5 Oct 2015 20:01:40 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=fVryv1cf; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; q=dns; s=default; b=xiW6ALPS6Ab08S4U30mXD+t7o62slKNMocgu43PlW0a7saZ4ym 8MTijTMpUnPGEU2AWzVPoMBal8m7aza8G0VSvaj5MTfe/O1K5IKPBGihY0ZppX3n 3+0G8+ixPRJiIBdUN0X3nkn/2l80yMbVZrs2kF9lkmrQckhpwExBnhSt0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; s= default; bh=YR0uJjcccVNlP91wO3pOIR2lpTk=; b=fVryv1cflcuM8BuejL35 CZyK2hDxZHwfEGGeMwnQbzojZbRhBEt5zXpboX3zy2tLcbCHG3LnWM8R4JR5iJAJ 8B1GO6GlWM1J3lHPIvmJVCN5Ya/0NCHT+lxjDK18wRUfByUmmsMNKP2CaW0TYGd2 xPte5ib37Aisrj2UblYa6jY= Received: (qmail 110505 invoked by alias); 5 Oct 2015 09:01:33 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 110451 invoked by uid 89); 5 Oct 2015 09:01:32 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.0 required=5.0 tests=AWL, BAYES_40, KAM_STOCKGEN, SPF_PASS, T_RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: eusmtp01.atmel.com Received: from eusmtp01.atmel.com (HELO eusmtp01.atmel.com) (212.144.249.243) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Mon, 05 Oct 2015 09:01:31 +0000 Received: from HNOCHT02.corp.atmel.com (10.161.30.162) by eusmtp01.atmel.com (10.161.101.31) with Microsoft SMTP Server (TLS) id 14.3.235.1; Mon, 5 Oct 2015 11:01:25 +0200 Received: from jaguar.corp.atmel.com (10.161.30.18) by HNOCHT02.corp.atmel.com (10.161.30.162) with Microsoft SMTP Server (TLS) id 14.3.235.1; Mon, 5 Oct 2015 11:01:25 +0200 Date: Mon, 5 Oct 2015 14:30:58 +0530 From: Senthil Kumar Selvaraj To: CC: , Subject: [Patch, avr] Fix PR 67839 - bit addressable instructions generated for out of range addresses Message-ID: <20151005090058.GA20023@jaguar.corp.atmel.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.24 (2015-08-30) X-IsSubscribed: yes Hi, As part of support for io and io_low attributes, the upper bound of the range check for low IO and IO addresses was changed from hardcoded values to hardcoded_range_end + 1 - GET_MODE_SIZE(mode). GCC passes VOID as the mode from genrecog, and GET_MODE_SIZE returns 0, resulting in the range getting incorrectly extended by a byte. Not sure why it was done, as the mode of the operand shouldn't really matter when computing the upper bound. In any case, the insns that use the predicate already have a mem:QI wrapping it, and all the bit addressable instructions operate on a single IO register only. This patch reverts the check back to a hardcoded value, and adds a test to prevent regressions. No new regression failures. If ok, could someone commit please? I don't have commit access. Regards Senthil gcc/ChangeLog 2015-10-05 Senthil Kumar Selvaraj PR target/67839 * config/avr/predicates.md (low_io_address_operand): Don't consider MODE when computing upper bound. (io_address_operand): Likewise. gcc/testsuite/ChangeLog 2015-10-05 Senthil Kumar Selvaraj PR target/67839 * gcc.target/avr/pr67839.c: New test. diff --git gcc/config/avr/predicates.md gcc/config/avr/predicates.md index 2d12bc6..622bc0b 100644 --- gcc/config/avr/predicates.md +++ gcc/config/avr/predicates.md @@ -46,7 +46,7 @@ (define_special_predicate "low_io_address_operand" (ior (and (match_code "const_int") (match_test "IN_RANGE (INTVAL (op) - avr_arch->sfr_offset, - 0, 0x20 - GET_MODE_SIZE (mode))")) + 0, 0x1F)")) (and (match_code "symbol_ref") (match_test "SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_IO_LOW")))) @@ -60,7 +60,7 @@ (define_special_predicate "io_address_operand" (ior (and (match_code "const_int") (match_test "IN_RANGE (INTVAL (op) - avr_arch->sfr_offset, - 0, 0x40 - GET_MODE_SIZE (mode))")) + 0, 0x3F)")) (and (match_code "symbol_ref") (match_test "SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_IO")))) diff --git gcc/testsuite/gcc.target/avr/pr67839.c gcc/testsuite/gcc.target/avr/pr67839.c new file mode 100644 index 0000000..604ab4b --- /dev/null +++ gcc/testsuite/gcc.target/avr/pr67839.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-Os" } */ +/* { dg-final { scan-assembler "sbi 0x1f,0" } } */ +/* { dg-final { scan-assembler "cbi 0x1f,0" } } */ +/* { dg-final { scan-assembler-not "sbi 0x20,0" } } */ +/* { dg-final { scan-assembler-not "cbi 0x20,0" } } */ +/* { dg-final { scan-assembler "in r\\d+,__SREG__" } } */ +/* { dg-final { scan-assembler "out __SREG__,r\\d+" } } */ +/* { dg-final { scan-assembler-not "in r\\d+,0x40" } } */ +/* { dg-final { scan-assembler-not "out 0x40, r\\d+" } } */ + +/* This testcase verifies that SBI/CBI/SBIS/SBIC + and IN/OUT instructions are not generated for + an IO addresses outside the valid range. +*/ +#define IO_ADDR(x) (*((volatile char *)x + __AVR_SFR_OFFSET__)) +int main () +{ + IO_ADDR(0x1f) |= 1; + IO_ADDR(0x1f) &= 0xFE; + + IO_ADDR(0x20) |= 1; + IO_ADDR(0x20) &= 0xFE; + + IO_ADDR(0x3f) = IO_ADDR(0x3f); + + IO_ADDR(0x40) = IO_ADDR(0x40); + return 0; +}