From patchwork Fri May 14 07:29:20 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 52597 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id CC6D9B7D77 for ; Fri, 14 May 2010 19:09:57 +1000 (EST) Received: from localhost ([127.0.0.1]:46517 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OCqu0-0000L5-G7 for incoming@patchwork.ozlabs.org; Fri, 14 May 2010 05:09:52 -0400 Received: from [140.186.70.92] (port=60028 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OCqkG-00042c-2X for qemu-devel@nongnu.org; Fri, 14 May 2010 04:59:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OCqkD-0007m6-TO for qemu-devel@nongnu.org; Fri, 14 May 2010 04:59:47 -0400 Received: from mail.valinux.co.jp ([210.128.90.3]:37522) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OCpO1-0002eU-OX for qemu-devel@nongnu.org; Fri, 14 May 2010 03:32:47 -0400 Received: from ps.local.valinux.co.jp (vagw.valinux.co.jp [210.128.90.14]) by mail.valinux.co.jp (Postfix) with SMTP id 3E918107160; Fri, 14 May 2010 16:32:39 +0900 (JST) Received: (nullmailer pid 28013 invoked by uid 1000); Fri, 14 May 2010 07:29:25 -0000 From: Isaku Yamahata To: qemu-devel@nongnu.org Date: Fri, 14 May 2010 16:29:20 +0900 Message-Id: <5a485ba308b893e68218bb1a822096d6c82aacb3.1273821065.git.yamahata@valinux.co.jp> X-Mailer: git-send-email 1.6.6.1 In-Reply-To: References: In-Reply-To: References: X-Virus-Scanned: clamav-milter 0.95.2 at va-mail.local.valinux.co.jp X-Virus-Status: Clean X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: blauwirbel@gmail.com, yamahata@valinux.co.jp, kraxel@redhat.com Subject: [Qemu-devel] [PATCH 22/26] pci hotadd, acpi_piix4: remove global variables X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org remove global variables, gpe and pci0_status by moving them into PIIX4PMState. Signed-off-by: Blue Swirl Signed-off-by: Isaku Yamahata Acked-by: Gerd Hoffmann --- Changes v12 -> v13: - minor style clean up Changes v10 -> v11: - change callback argument of hotplug from void* to DeviceState*. --- hw/acpi_piix4.c | 89 +++++++++++++++++++++++++++++------------------------- hw/pc.h | 1 - hw/pc_piix.c | 1 - 3 files changed, 48 insertions(+), 43 deletions(-) diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index c3e71e3..bb3d094 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -29,6 +29,20 @@ #define ACPI_DBG_IO_ADDR 0xb044 +#define GPE_BASE 0xafe0 +#define PCI_BASE 0xae00 +#define PCI_EJ_BASE 0xae08 + +struct gpe_regs { + uint16_t sts; /* status */ + uint16_t en; /* enabled */ +}; + +struct pci_status { + uint32_t up; + uint32_t down; +}; + typedef struct PIIX4PMState { PCIDevice dev; uint16_t pmsts; @@ -47,13 +61,17 @@ typedef struct PIIX4PMState { qemu_irq cmos_s3; qemu_irq smi_irq; int kvm_enabled; + + /* for pci hotplug */ + struct gpe_regs gpe; + struct pci_status pci0_status; } PIIX4PMState; +static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s); + #define ACPI_ENABLE 0xf1 #define ACPI_DISABLE 0xf0 -static PIIX4PMState *pm_state; - static uint32_t get_pmtmr(PIIX4PMState *s) { uint32_t d; @@ -325,7 +343,6 @@ static int piix4_pm_initfn(PCIDevice *dev) PIIX4PMState *s = DO_UPCAST(PIIX4PMState, dev, dev); uint8_t *pci_conf; - pm_state = s; pci_conf = s->dev.config; pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB_3); @@ -369,6 +386,7 @@ static int piix4_pm_initfn(PCIDevice *dev) pm_smbus_init(&s->dev.qdev, &s->smb); qemu_register_reset(piix4_reset, s); + piix4_acpi_system_hot_add_init(dev->bus, s); return 0; } @@ -414,23 +432,6 @@ static void piix4_pm_register(void) device_init(piix4_pm_register); -#define GPE_BASE 0xafe0 -#define PCI_BASE 0xae00 -#define PCI_EJ_BASE 0xae08 - -struct gpe_regs { - uint16_t sts; /* status */ - uint16_t en; /* enabled */ -}; - -struct pci_status { - uint32_t up; - uint32_t down; -}; - -static struct gpe_regs gpe; -static struct pci_status pci0_status; - static uint32_t gpe_read_val(uint16_t val, uint32_t addr) { if (addr & 1) @@ -570,45 +571,51 @@ static void pciej_write(void *opaque, uint32_t addr, uint32_t val) static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, int state); -void piix4_acpi_system_hot_add_init(PCIBus *bus) +static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) { - register_ioport_write(GPE_BASE, 4, 1, gpe_writeb, &gpe); - register_ioport_read(GPE_BASE, 4, 1, gpe_readb, &gpe); + struct gpe_regs *gpe = &s->gpe; + struct pci_status *pci0_status = &s->pci0_status; - register_ioport_write(PCI_BASE, 8, 4, pcihotplug_write, &pci0_status); - register_ioport_read(PCI_BASE, 8, 4, pcihotplug_read, &pci0_status); + register_ioport_write(GPE_BASE, 4, 1, gpe_writeb, gpe); + register_ioport_read(GPE_BASE, 4, 1, gpe_readb, gpe); + + register_ioport_write(PCI_BASE, 8, 4, pcihotplug_write, pci0_status); + register_ioport_read(PCI_BASE, 8, 4, pcihotplug_read, pci0_status); register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, bus); register_ioport_read(PCI_EJ_BASE, 4, 4, pciej_read, bus); - pci_bus_hotplug(bus, piix4_device_hotplug, NULL); + pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev); } -static void enable_device(struct pci_status *p, struct gpe_regs *g, int slot) +static void enable_device(PIIX4PMState *s, int slot) { - g->sts |= 2; - p->up |= (1 << slot); + s->gpe.sts |= 2; + s->pci0_status.up |= (1 << slot); } -static void disable_device(struct pci_status *p, struct gpe_regs *g, int slot) +static void disable_device(PIIX4PMState *s, int slot) { - g->sts |= 2; - p->down |= (1 << slot); + s->gpe.sts |= 2; + s->pci0_status.down |= (1 << slot); } static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, int state) { int slot = PCI_SLOT(dev->devfn); + PIIX4PMState *s = DO_UPCAST(PIIX4PMState, dev, + DO_UPCAST(PCIDevice, qdev, qdev)); - pci0_status.up = 0; - pci0_status.down = 0; - if (state) - enable_device(&pci0_status, &gpe, slot); - else - disable_device(&pci0_status, &gpe, slot); - if (gpe.en & 2) { - qemu_set_irq(pm_state->irq, 1); - qemu_set_irq(pm_state->irq, 0); + s->pci0_status.up = 0; + s->pci0_status.down = 0; + if (state) { + enable_device(s, slot); + } else { + disable_device(s, slot); + } + if (s->gpe.en & 2) { + qemu_set_irq(s->irq, 1); + qemu_set_irq(s->irq, 0); } return 0; } diff --git a/hw/pc.h b/hw/pc.h index 2e2f4e2..654b7b3 100644 --- a/hw/pc.h +++ b/hw/pc.h @@ -124,7 +124,6 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq, int kvm_enabled); void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); -void piix4_acpi_system_hot_add_init(PCIBus *bus); /* hpet.c */ extern int no_hpet; diff --git a/hw/pc_piix.c b/hw/pc_piix.c index a0ed7ad..70f563a 100644 --- a/hw/pc_piix.c +++ b/hw/pc_piix.c @@ -150,7 +150,6 @@ static void pc_init1(ram_addr_t ram_size, qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256)); qdev_init_nofail(eeprom); } - piix4_acpi_system_hot_add_init(pci_bus); } if (i440fx_state) {