From patchwork Fri May 14 07:29:18 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 52591 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id CB532B7E54 for ; Fri, 14 May 2010 18:52:14 +1000 (EST) Received: from localhost ([127.0.0.1]:56667 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OCqcu-0006OP-19 for incoming@patchwork.ozlabs.org; Fri, 14 May 2010 04:52:12 -0400 Received: from [140.186.70.92] (port=43063 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OCqaC-0005iN-6Q for qemu-devel@nongnu.org; Fri, 14 May 2010 04:49:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OCqaA-0005la-GA for qemu-devel@nongnu.org; Fri, 14 May 2010 04:49:24 -0400 Received: from mail.valinux.co.jp ([210.128.90.3]:37532) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OCpO2-0002fP-Ok for qemu-devel@nongnu.org; Fri, 14 May 2010 03:32:47 -0400 Received: from ps.local.valinux.co.jp (vagw.valinux.co.jp [210.128.90.14]) by mail.valinux.co.jp (Postfix) with SMTP id 04DC810715F; Fri, 14 May 2010 16:32:39 +0900 (JST) Received: (nullmailer pid 28009 invoked by uid 1000); Fri, 14 May 2010 07:29:25 -0000 From: Isaku Yamahata To: qemu-devel@nongnu.org Date: Fri, 14 May 2010 16:29:18 +0900 Message-Id: X-Mailer: git-send-email 1.6.6.1 In-Reply-To: References: In-Reply-To: References: X-Virus-Scanned: clamav-milter 0.95.2 at va-mail.local.valinux.co.jp X-Virus-Status: Clean X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: blauwirbel@gmail.com, yamahata@valinux.co.jp, kraxel@redhat.com Subject: [Qemu-devel] [PATCH 20/26] acpi_piix4: qdevfy. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org qdevfy acpi_piix4. Signed-off-by: Isaku Yamahata Acked-by: Gerd Hoffmann --- changes v10 -> v11: - pass DeviceState of piix4-pm to pc_smbus_init(). Now info qtree shows smbus. --- hw/acpi_piix4.c | 61 +++++++++++++++++++++++++++++++++++++++++------------- 1 files changed, 46 insertions(+), 15 deletions(-) diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 1292d2b..d4f4662 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -41,6 +41,7 @@ typedef struct PIIX4PMState { int64_t tmr_overflow_time; PMSMBus smb; + uint32_t smb_io_base; qemu_irq irq; qemu_irq cmos_s3; @@ -319,16 +320,11 @@ static void piix4_powerdown(void *opaque, int irq, int power_failing) } } -i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, - qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq, - int kvm_enabled) +static int piix4_pm_initfn(PCIDevice *dev) { - PIIX4PMState *s; + PIIX4PMState *s = DO_UPCAST(PIIX4PMState, dev, dev); uint8_t *pci_conf; - s = (PIIX4PMState *)pci_register_device(bus, - "PM", sizeof(PIIX4PMState), - devfn, NULL, pm_write_config); pm_state = s; pci_conf = s->dev.config; pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); @@ -348,7 +344,6 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, register_ioport_write(ACPI_DBG_IO_ADDR, 4, 4, acpi_dbg_writel, s); - s->kvm_enabled = kvm_enabled; if (s->kvm_enabled) { /* Mark SMM as already inited to prevent SMM from running. KVM does not * support SMM mode. */ @@ -362,27 +357,63 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, pci_conf[0x67] = (serial_hds[0] != NULL ? 0x08 : 0) | (serial_hds[1] != NULL ? 0x90 : 0); - pci_conf[0x90] = smb_io_base | 1; - pci_conf[0x91] = smb_io_base >> 8; + pci_conf[0x90] = s->smb_io_base | 1; + pci_conf[0x91] = s->smb_io_base >> 8; pci_conf[0xd2] = 0x09; - register_ioport_write(smb_io_base, 64, 1, smb_ioport_writeb, &s->smb); - register_ioport_read(smb_io_base, 64, 1, smb_ioport_readb, &s->smb); + register_ioport_write(s->smb_io_base, 64, 1, smb_ioport_writeb, &s->smb); + register_ioport_read(s->smb_io_base, 64, 1, smb_ioport_readb, &s->smb); s->tmr_timer = qemu_new_timer(vm_clock, pm_tmr_timer, s); qemu_system_powerdown = *qemu_allocate_irqs(piix4_powerdown, s, 1); - vmstate_register(0, &vmstate_acpi, s); + pm_smbus_init(&s->dev.qdev, &s->smb); + qemu_register_reset(piix4_reset, s); + + return 0; +} - pm_smbus_init(NULL, &s->smb); +i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, + qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq, + int kvm_enabled) +{ + PCIDevice *dev; + PIIX4PMState *s; + + dev = pci_create(bus, devfn, "PIIX4_PM"); + qdev_prop_set_uint32(&dev->qdev, "smb_io_base", smb_io_base); + + s = DO_UPCAST(PIIX4PMState, dev, dev); s->irq = sci_irq; s->cmos_s3 = cmos_s3; s->smi_irq = smi_irq; - qemu_register_reset(piix4_reset, s); + s->kvm_enabled = kvm_enabled; + + qdev_init_nofail(&dev->qdev); return s->smb.smbus; } +static PCIDeviceInfo piix4_pm_info = { + .qdev.name = "PIIX4_PM", + .qdev.desc = "PM", + .qdev.size = sizeof(PIIX4PMState), + .qdev.vmsd = &vmstate_acpi, + .init = piix4_pm_initfn, + .config_write = pm_write_config, + .qdev.props = (Property[]) { + DEFINE_PROP_UINT32("smb_io_base", PIIX4PMState, smb_io_base, 0), + DEFINE_PROP_END_OF_LIST(), + } +}; + +static void piix4_pm_register(void) +{ + pci_qdev_register(&piix4_pm_info); +} + +device_init(piix4_pm_register); + #define GPE_BASE 0xafe0 #define PCI_BASE 0xae00 #define PCI_EJ_BASE 0xae08