diff mbox

[U-Boot,6/6] x86: Allow disabling IGD on Intel Queensbay

Message ID 1443684964-342-7-git-send-email-bmeng.cn@gmail.com
State Accepted
Delegated to: Simon Glass
Headers show

Commit Message

Bin Meng Oct. 1, 2015, 7:36 a.m. UTC
Add a Kconfig option to disable the Integrated Graphics Device (IGD)
so that it does not show in the PCI configuration space as a VGA
disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
based graphics card's VGA BIOS and use that for the graphics console.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

 arch/x86/cpu/queensbay/Kconfig            |  8 ++++++++
 arch/x86/cpu/queensbay/tnc.c              | 19 +++++++++++++++++++
 arch/x86/include/asm/arch-queensbay/tnc.h |  5 +++++
 include/configs/crownbay.h                |  1 +
 4 files changed, 33 insertions(+)

Comments

Simon Glass Oct. 3, 2015, 2:29 p.m. UTC | #1
Hi Bin,

On 1 October 2015 at 08:36, Bin Meng <bmeng.cn@gmail.com> wrote:
> Add a Kconfig option to disable the Integrated Graphics Device (IGD)
> so that it does not show in the PCI configuration space as a VGA
> disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
> based graphics card's VGA BIOS and use that for the graphics console.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
>  arch/x86/cpu/queensbay/Kconfig            |  8 ++++++++
>  arch/x86/cpu/queensbay/tnc.c              | 19 +++++++++++++++++++
>  arch/x86/include/asm/arch-queensbay/tnc.h |  5 +++++
>  include/configs/crownbay.h                |  1 +
>  4 files changed, 33 insertions(+)

Acked-by: Simon Glass <sjg@chromium.org>

But do we really want configs for such device-specific things? I
wonder if device tree would be better. E.g. add 'status = "disabled"'
in the PCI node.

>
> diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig
> index fbf85f2..6136d75 100644
> --- a/arch/x86/cpu/queensbay/Kconfig
> +++ b/arch/x86/cpu/queensbay/Kconfig
> @@ -42,4 +42,12 @@ config CPU_ADDR_BITS
>         int
>         default 32
>
> +config DISABLE_IGD
> +       bool "Disable Integrated Graphics Device (IGD)"
> +       help
> +         Disable the Integrated Graphics Device (IGD) so that it does not
> +         show in the PCI configuration space as a VGA disaplay controller.
> +         This gives a chance for U-Boot to run PCI/PCIe based graphics
> +         card's VGA BIOS and use that card for the graphics console.
> +
>  endif
> diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
> index 9682cff..0c02a44 100644
> --- a/arch/x86/cpu/queensbay/tnc.c
> +++ b/arch/x86/cpu/queensbay/tnc.c
> @@ -23,6 +23,16 @@ static void unprotect_spi_flash(void)
>         x86_pci_write_config32(TNC_LPC, 0xd8, bc);
>  }
>
> +static void __maybe_unused disable_igd(void)
> +{
> +       u32 gc;
> +
> +       gc = x86_pci_read_config32(TNC_IGD, IGD_GC);
> +       gc &= ~GMS_MASK;
> +       gc |= VGA_DISABLE;
> +       x86_pci_write_config32(TNC_IGD, IGD_GC, gc);
> +}
> +
>  int arch_cpu_init(void)
>  {
>         int ret;
> @@ -39,6 +49,15 @@ int arch_cpu_init(void)
>         return 0;
>  }
>
> +int arch_early_init_r(void)
> +{
> +#ifdef CONFIG_DISABLE_IGD
> +       disable_igd();
> +#endif
> +
> +       return 0;
> +}
> +
>  void cpu_irq_init(void)
>  {
>         struct tnc_rcba *rcba;
> diff --git a/arch/x86/include/asm/arch-queensbay/tnc.h b/arch/x86/include/asm/arch-queensbay/tnc.h
> index ad9a6c4..2365394 100644
> --- a/arch/x86/include/asm/arch-queensbay/tnc.h
> +++ b/arch/x86/include/asm/arch-queensbay/tnc.h
> @@ -7,6 +7,11 @@
>  #ifndef _X86_ARCH_TNC_H_
>  #define _X86_ARCH_TNC_H_
>
> +/* IGD Control Register */
> +#define IGD_GC         0x50
> +#define VGA_DISABLE    0x00020000
> +#define GMS_MASK       0x00700000
> +
>  /* Memory BAR Enable */
>  #define MEM_BAR_EN     0x00000001
>
> diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
> index 3153a74..7f91fff 100644
> --- a/include/configs/crownbay.h
> +++ b/include/configs/crownbay.h
> @@ -15,6 +15,7 @@
>
>  #define CONFIG_SYS_MONITOR_LEN         (1 << 20)
>  #define CONFIG_BOARD_EARLY_INIT_F
> +#define CONFIG_ARCH_EARLY_INIT_R
>  #define CONFIG_ARCH_MISC_INIT
>
>  #define CONFIG_SMSC_LPC47M
> --
> 1.8.2.1
>

Regards,
Simon
Bin Meng Oct. 7, 2015, 8:24 a.m. UTC | #2
Hi Simon,

On Sat, Oct 3, 2015 at 10:29 PM, Simon Glass <sjg@chromium.org> wrote:
> Hi Bin,
>
> On 1 October 2015 at 08:36, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Add a Kconfig option to disable the Integrated Graphics Device (IGD)
>> so that it does not show in the PCI configuration space as a VGA
>> disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
>> based graphics card's VGA BIOS and use that for the graphics console.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>>  arch/x86/cpu/queensbay/Kconfig            |  8 ++++++++
>>  arch/x86/cpu/queensbay/tnc.c              | 19 +++++++++++++++++++
>>  arch/x86/include/asm/arch-queensbay/tnc.h |  5 +++++
>>  include/configs/crownbay.h                |  1 +
>>  4 files changed, 33 insertions(+)
>
> Acked-by: Simon Glass <sjg@chromium.org>
>
> But do we really want configs for such device-specific things? I
> wonder if device tree would be better. E.g. add 'status = "disabled"'
> in the PCI node.
>

I am not sure if I understand you correctly. To me 'status =
"disabled"' is a generic device binding, and when it comes to PCI
device, how do we define a device is in a 'disabled' state? Is it we
program the COMMAND register to disable bus master, mem and I/O
access? Or we program a chipset-specific register (Intel chipset
normally has such) to make it invisible from PCI configuration space
completely? And as you said, this is really chipset-specific thing, so
I chose to do via a platform-specific configuration macro, instead of
doing such work under a generic bindings ..

[snip]

Regards,
Bin
Simon Glass Oct. 9, 2015, 9:36 a.m. UTC | #3
Hi Bin,

On 7 October 2015 at 09:24, Bin Meng <bmeng.cn@gmail.com> wrote:
> Hi Simon,
>
> On Sat, Oct 3, 2015 at 10:29 PM, Simon Glass <sjg@chromium.org> wrote:
>> Hi Bin,
>>
>> On 1 October 2015 at 08:36, Bin Meng <bmeng.cn@gmail.com> wrote:
>>> Add a Kconfig option to disable the Integrated Graphics Device (IGD)
>>> so that it does not show in the PCI configuration space as a VGA
>>> disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
>>> based graphics card's VGA BIOS and use that for the graphics console.
>>>
>>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>>
>>> ---
>>>
>>>  arch/x86/cpu/queensbay/Kconfig            |  8 ++++++++
>>>  arch/x86/cpu/queensbay/tnc.c              | 19 +++++++++++++++++++
>>>  arch/x86/include/asm/arch-queensbay/tnc.h |  5 +++++
>>>  include/configs/crownbay.h                |  1 +
>>>  4 files changed, 33 insertions(+)
>>
>> Acked-by: Simon Glass <sjg@chromium.org>
>>
>> But do we really want configs for such device-specific things? I
>> wonder if device tree would be better. E.g. add 'status = "disabled"'
>> in the PCI node.
>>
>
> I am not sure if I understand you correctly. To me 'status =
> "disabled"' is a generic device binding, and when it comes to PCI
> device, how do we define a device is in a 'disabled' state? Is it we
> program the COMMAND register to disable bus master, mem and I/O
> access? Or we program a chipset-specific register (Intel chipset
> normally has such) to make it invisible from PCI configuration space
> completely? And as you said, this is really chipset-specific thing, so
> I chose to do via a platform-specific configuration macro, instead of
> doing such work under a generic bindings ..

Yes we don't have a good way to notice that a driver is disabled - it
will never be bound in that case.

If there were a driver for the SoC, then perhaps we could add config
options to that node. Then the chipset-specific SoC driver could do
the required init.

Regards,
Simon
Simon Glass Oct. 18, 2015, 9:37 p.m. UTC | #4
On 3 October 2015 at 08:29, Simon Glass <sjg@chromium.org> wrote:
> Hi Bin,
>
> On 1 October 2015 at 08:36, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Add a Kconfig option to disable the Integrated Graphics Device (IGD)
>> so that it does not show in the PCI configuration space as a VGA
>> disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
>> based graphics card's VGA BIOS and use that for the graphics console.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>>  arch/x86/cpu/queensbay/Kconfig            |  8 ++++++++
>>  arch/x86/cpu/queensbay/tnc.c              | 19 +++++++++++++++++++
>>  arch/x86/include/asm/arch-queensbay/tnc.h |  5 +++++
>>  include/configs/crownbay.h                |  1 +
>>  4 files changed, 33 insertions(+)
>
> Acked-by: Simon Glass <sjg@chromium.org>
>
> But do we really want configs for such device-specific things? I
> wonder if device tree would be better. E.g. add 'status = "disabled"'
> in the PCI node.
>
>>
>> diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig
>> index fbf85f2..6136d75 100644
>> --- a/arch/x86/cpu/queensbay/Kconfig
>> +++ b/arch/x86/cpu/queensbay/Kconfig
>> @@ -42,4 +42,12 @@ config CPU_ADDR_BITS
>>         int
>>         default 32
>>
>> +config DISABLE_IGD
>> +       bool "Disable Integrated Graphics Device (IGD)"
>> +       help
>> +         Disable the Integrated Graphics Device (IGD) so that it does not
>> +         show in the PCI configuration space as a VGA disaplay controller.
>> +         This gives a chance for U-Boot to run PCI/PCIe based graphics
>> +         card's VGA BIOS and use that card for the graphics console.
>> +
>>  endif
>> diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
>> index 9682cff..0c02a44 100644
>> --- a/arch/x86/cpu/queensbay/tnc.c
>> +++ b/arch/x86/cpu/queensbay/tnc.c
>> @@ -23,6 +23,16 @@ static void unprotect_spi_flash(void)
>>         x86_pci_write_config32(TNC_LPC, 0xd8, bc);
>>  }
>>
>> +static void __maybe_unused disable_igd(void)
>> +{
>> +       u32 gc;
>> +
>> +       gc = x86_pci_read_config32(TNC_IGD, IGD_GC);
>> +       gc &= ~GMS_MASK;
>> +       gc |= VGA_DISABLE;
>> +       x86_pci_write_config32(TNC_IGD, IGD_GC, gc);
>> +}
>> +
>>  int arch_cpu_init(void)
>>  {
>>         int ret;
>> @@ -39,6 +49,15 @@ int arch_cpu_init(void)
>>         return 0;
>>  }
>>
>> +int arch_early_init_r(void)
>> +{
>> +#ifdef CONFIG_DISABLE_IGD
>> +       disable_igd();
>> +#endif
>> +
>> +       return 0;
>> +}
>> +
>>  void cpu_irq_init(void)
>>  {
>>         struct tnc_rcba *rcba;
>> diff --git a/arch/x86/include/asm/arch-queensbay/tnc.h b/arch/x86/include/asm/arch-queensbay/tnc.h
>> index ad9a6c4..2365394 100644
>> --- a/arch/x86/include/asm/arch-queensbay/tnc.h
>> +++ b/arch/x86/include/asm/arch-queensbay/tnc.h
>> @@ -7,6 +7,11 @@
>>  #ifndef _X86_ARCH_TNC_H_
>>  #define _X86_ARCH_TNC_H_
>>
>> +/* IGD Control Register */
>> +#define IGD_GC         0x50
>> +#define VGA_DISABLE    0x00020000
>> +#define GMS_MASK       0x00700000
>> +
>>  /* Memory BAR Enable */
>>  #define MEM_BAR_EN     0x00000001
>>
>> diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
>> index 3153a74..7f91fff 100644
>> --- a/include/configs/crownbay.h
>> +++ b/include/configs/crownbay.h
>> @@ -15,6 +15,7 @@
>>
>>  #define CONFIG_SYS_MONITOR_LEN         (1 << 20)
>>  #define CONFIG_BOARD_EARLY_INIT_F
>> +#define CONFIG_ARCH_EARLY_INIT_R
>>  #define CONFIG_ARCH_MISC_INIT
>>
>>  #define CONFIG_SMSC_LPC47M
>> --
>> 1.8.2.1
>>
>
> Regards,
> Simon

Applied to u-boot-x86, thanks!
diff mbox

Patch

diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig
index fbf85f2..6136d75 100644
--- a/arch/x86/cpu/queensbay/Kconfig
+++ b/arch/x86/cpu/queensbay/Kconfig
@@ -42,4 +42,12 @@  config CPU_ADDR_BITS
 	int
 	default 32
 
+config DISABLE_IGD
+	bool "Disable Integrated Graphics Device (IGD)"
+	help
+	  Disable the Integrated Graphics Device (IGD) so that it does not
+	  show in the PCI configuration space as a VGA disaplay controller.
+	  This gives a chance for U-Boot to run PCI/PCIe based graphics
+	  card's VGA BIOS and use that card for the graphics console.
+
 endif
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index 9682cff..0c02a44 100644
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -23,6 +23,16 @@  static void unprotect_spi_flash(void)
 	x86_pci_write_config32(TNC_LPC, 0xd8, bc);
 }
 
+static void __maybe_unused disable_igd(void)
+{
+	u32 gc;
+
+	gc = x86_pci_read_config32(TNC_IGD, IGD_GC);
+	gc &= ~GMS_MASK;
+	gc |= VGA_DISABLE;
+	x86_pci_write_config32(TNC_IGD, IGD_GC, gc);
+}
+
 int arch_cpu_init(void)
 {
 	int ret;
@@ -39,6 +49,15 @@  int arch_cpu_init(void)
 	return 0;
 }
 
+int arch_early_init_r(void)
+{
+#ifdef CONFIG_DISABLE_IGD
+	disable_igd();
+#endif
+
+	return 0;
+}
+
 void cpu_irq_init(void)
 {
 	struct tnc_rcba *rcba;
diff --git a/arch/x86/include/asm/arch-queensbay/tnc.h b/arch/x86/include/asm/arch-queensbay/tnc.h
index ad9a6c4..2365394 100644
--- a/arch/x86/include/asm/arch-queensbay/tnc.h
+++ b/arch/x86/include/asm/arch-queensbay/tnc.h
@@ -7,6 +7,11 @@ 
 #ifndef _X86_ARCH_TNC_H_
 #define _X86_ARCH_TNC_H_
 
+/* IGD Control Register */
+#define IGD_GC		0x50
+#define VGA_DISABLE	0x00020000
+#define GMS_MASK	0x00700000
+
 /* Memory BAR Enable */
 #define MEM_BAR_EN	0x00000001
 
diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
index 3153a74..7f91fff 100644
--- a/include/configs/crownbay.h
+++ b/include/configs/crownbay.h
@@ -15,6 +15,7 @@ 
 
 #define CONFIG_SYS_MONITOR_LEN		(1 << 20)
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_ARCH_EARLY_INIT_R
 #define CONFIG_ARCH_MISC_INIT
 
 #define CONFIG_SMSC_LPC47M