diff mbox

[4/7] tcg/mips: Support r6 JR encoding

Message ID 1443627027-2193-5-git-send-email-james.hogan@imgtec.com
State New
Headers show

Commit Message

James Hogan Sept. 30, 2015, 3:30 p.m. UTC
MIPSr6 encodes JR as JALR with zero as the link register, and the pre-r6
JR encoding is removed. Update TCG to use the new encoding when built
for r6.

We still use the old encoding for pre-r6, so as not to confuse return
prediction stack hardware which may detect only particular encodings of
the return instruction.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Aurelien Jarno <aurelien@aurel32.net>
---
 tcg/mips/tcg-target.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Richard Henderson Sept. 30, 2015, 8:49 p.m. UTC | #1
On 10/01/2015 01:30 AM, James Hogan wrote:
> MIPSr6 encodes JR as JALR with zero as the link register, and the pre-r6
> JR encoding is removed. Update TCG to use the new encoding when built
> for r6.
>
> We still use the old encoding for pre-r6, so as not to confuse return
> prediction stack hardware which may detect only particular encodings of
> the return instruction.
>
> Signed-off-by: James Hogan <james.hogan@imgtec.com>
> Cc: Richard Henderson <rth@twiddle.net>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> ---
>   tcg/mips/tcg-target.c | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
> index 4305af967326..0a16140b1cdb 100644
> --- a/tcg/mips/tcg-target.c
> +++ b/tcg/mips/tcg-target.c
> @@ -288,7 +288,7 @@ typedef enum {
>       OPC_SRLV     = OPC_SPECIAL | 0x06,
>       OPC_ROTRV    = OPC_SPECIAL | (0x01 <<  6) | 0x06,
>       OPC_SRAV     = OPC_SPECIAL | 0x07,
> -    OPC_JR       = OPC_SPECIAL | 0x08,
> +    OPC_JR_R5    = OPC_SPECIAL | 0x08,
>       OPC_JALR     = OPC_SPECIAL | 0x09,
>       OPC_MOVZ     = OPC_SPECIAL | 0x0A,
>       OPC_MOVN     = OPC_SPECIAL | 0x0B,
> @@ -322,6 +322,9 @@ typedef enum {
>       OPC_SEH      = OPC_SPECIAL3 | 0x620,
>   } MIPSInsn;
>
> +/* MIPS r6 doesn't have JR, JALR should be used instead */
> +#define OPC_JR (use_mips32r6_instructions ? OPC_JALR : OPC_JR_R5)

This could be done in the enum instead of a define, but otherwise,


Reviewed-by: Richard Henderson <rth@twiddle.net>


r~
James Hogan Sept. 30, 2015, 9:24 p.m. UTC | #2
Hi Richard,

On Thu, Oct 01, 2015 at 06:49:11AM +1000, Richard Henderson wrote:
> On 10/01/2015 01:30 AM, James Hogan wrote:
> > MIPSr6 encodes JR as JALR with zero as the link register, and the pre-r6
> > JR encoding is removed. Update TCG to use the new encoding when built
> > for r6.
> >
> > We still use the old encoding for pre-r6, so as not to confuse return
> > prediction stack hardware which may detect only particular encodings of
> > the return instruction.
> >
> > Signed-off-by: James Hogan <james.hogan@imgtec.com>
> > Cc: Richard Henderson <rth@twiddle.net>
> > Cc: Aurelien Jarno <aurelien@aurel32.net>
> > ---
> >   tcg/mips/tcg-target.c | 5 ++++-
> >   1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
> > index 4305af967326..0a16140b1cdb 100644
> > --- a/tcg/mips/tcg-target.c
> > +++ b/tcg/mips/tcg-target.c
> > @@ -288,7 +288,7 @@ typedef enum {
> >       OPC_SRLV     = OPC_SPECIAL | 0x06,
> >       OPC_ROTRV    = OPC_SPECIAL | (0x01 <<  6) | 0x06,
> >       OPC_SRAV     = OPC_SPECIAL | 0x07,
> > -    OPC_JR       = OPC_SPECIAL | 0x08,
> > +    OPC_JR_R5    = OPC_SPECIAL | 0x08,
> >       OPC_JALR     = OPC_SPECIAL | 0x09,
> >       OPC_MOVZ     = OPC_SPECIAL | 0x0A,
> >       OPC_MOVN     = OPC_SPECIAL | 0x0B,
> > @@ -322,6 +322,9 @@ typedef enum {
> >       OPC_SEH      = OPC_SPECIAL3 | 0x620,
> >   } MIPSInsn;
> >
> > +/* MIPS r6 doesn't have JR, JALR should be used instead */
> > +#define OPC_JR (use_mips32r6_instructions ? OPC_JALR : OPC_JR_R5)
> 
> This could be done in the enum instead of a define, but otherwise,

True, I'll do that.

Thanks
James

> 
> 
> Reviewed-by: Richard Henderson <rth@twiddle.net>
> 
> 
> r~
> 
>
diff mbox

Patch

diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index 4305af967326..0a16140b1cdb 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -288,7 +288,7 @@  typedef enum {
     OPC_SRLV     = OPC_SPECIAL | 0x06,
     OPC_ROTRV    = OPC_SPECIAL | (0x01 <<  6) | 0x06,
     OPC_SRAV     = OPC_SPECIAL | 0x07,
-    OPC_JR       = OPC_SPECIAL | 0x08,
+    OPC_JR_R5    = OPC_SPECIAL | 0x08,
     OPC_JALR     = OPC_SPECIAL | 0x09,
     OPC_MOVZ     = OPC_SPECIAL | 0x0A,
     OPC_MOVN     = OPC_SPECIAL | 0x0B,
@@ -322,6 +322,9 @@  typedef enum {
     OPC_SEH      = OPC_SPECIAL3 | 0x620,
 } MIPSInsn;
 
+/* MIPS r6 doesn't have JR, JALR should be used instead */
+#define OPC_JR (use_mips32r6_instructions ? OPC_JALR : OPC_JR_R5)
+
 /*
  * Type reg
  */