From patchwork Thu May 6 15:50:45 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 51857 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 57C62B7D1E for ; Fri, 7 May 2010 04:12:29 +1000 (EST) Received: from localhost ([127.0.0.1]:44770 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OA57B-0006Yp-RC for incoming@patchwork.ozlabs.org; Thu, 06 May 2010 13:44:02 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1OA51E-0005Yi-0g for qemu-devel@nongnu.org; Thu, 06 May 2010 13:37:52 -0400 Received: from [140.186.70.92] (port=51385 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OA515-0004tj-ML for qemu-devel@nongnu.org; Thu, 06 May 2010 13:37:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OA50R-0004nB-DO for qemu-devel@nongnu.org; Thu, 06 May 2010 13:37:06 -0400 Received: from are.twiddle.net ([75.149.56.221]:47607) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OA50R-0004mh-5b for qemu-devel@nongnu.org; Thu, 06 May 2010 13:37:03 -0400 Received: from anchor.twiddle.home (anchor.twiddle.home [172.31.0.4]) by are.twiddle.net (Postfix) with ESMTPS id BB1BA107F; Thu, 6 May 2010 10:37:01 -0700 (PDT) Received: from anchor.twiddle.home (anchor.twiddle.home [127.0.0.1]) by anchor.twiddle.home (8.14.4/8.14.4) with ESMTP id o46Fol5e002923; Thu, 6 May 2010 08:50:47 -0700 Received: (from rth@localhost) by anchor.twiddle.home (8.14.4/8.14.4/Submit) id o46FolHO002922; Thu, 6 May 2010 08:50:47 -0700 From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 6 May 2010 08:50:45 -0700 Message-Id: <1273161045-2880-6-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.0.1 In-Reply-To: <1273161045-2880-1-git-send-email-rth@twiddle.net> References: <1273161045-2880-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 5/5] tcg-ppc: Conditionally reserve TCG_GUEST_BASE_REG. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org We need not reserve the register unless we're going to use it. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c | 8 ++++---- tcg/ppc64/tcg-target.c | 9 ++++----- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index ce078e4..654d244 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -933,7 +933,10 @@ void tcg_target_qemu_prologue (TCGContext *s) tcg_out32 (s, STW | RS (0) | RA (1) | (frame_size + LR_OFFSET)); #ifdef CONFIG_USE_GUEST_BASE - tcg_out_movi (s, TCG_TYPE_I32, TCG_GUEST_BASE_REG, GUEST_BASE); + if (GUEST_BASE) { + tcg_out_movi (s, TCG_TYPE_I32, TCG_GUEST_BASE_REG, GUEST_BASE); + tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); + } #endif tcg_out32 (s, MTSPR | RS (3) | CTR); @@ -1914,9 +1917,6 @@ void tcg_target_init(TCGContext *s) #ifdef _CALL_SYSV tcg_regset_set_reg(s->reserved_regs, TCG_REG_R13); #endif -#ifdef CONFIG_USE_GUEST_BASE - tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); -#endif tcg_add_target_add_op_defs(ppc_op_defs); } diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index 2d436a5..a1e643c 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -899,7 +899,10 @@ void tcg_target_qemu_prologue (TCGContext *s) tcg_out32 (s, STD | RS (0) | RA (1) | (frame_size + 16)); #ifdef CONFIG_USE_GUEST_BASE - tcg_out_movi (s, TCG_TYPE_I64, TCG_GUEST_BASE_REG, GUEST_BASE); + if (GUEST_BASE) { + tcg_out_movi (s, TCG_TYPE_I64, TCG_GUEST_BASE_REG, GUEST_BASE); + tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); + } #endif tcg_out32 (s, MTSPR | RS (3) | CTR); @@ -1692,9 +1695,5 @@ void tcg_target_init (TCGContext *s) #endif tcg_regset_set_reg (s->reserved_regs, TCG_REG_R13); -#ifdef CONFIG_USE_GUEST_BASE - tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); -#endif - tcg_add_target_add_op_defs (ppc_op_defs); }