@@ -129,6 +129,7 @@
#define NDCB0_CMD_XTYPE_MASK (0x7 << 29)
#define NDCB0_CMD_XTYPE(x) (((x) << 29) & NDCB0_CMD_XTYPE_MASK)
+#define NDCB0_LEN_OVRD (0x1 << 28)
#define NDCB0_ST_ROW_EN (0x1 << 26)
#define NDCB0_AUTO_RS (0x1 << 25)
#define NDCB0_CSEL (0x1 << 24)
@@ -257,8 +258,9 @@ struct pxa3xx_nand_info {
uint8_t total_cmds;
uint8_t wait_ready[CMD_POOL_SIZE];
uint32_t ndcb0[CMD_POOL_SIZE];
- uint32_t ndcb1;
- uint32_t ndcb2;
+ uint32_t ndcb1[CMD_POOL_SIZE];
+ uint32_t ndcb2[CMD_POOL_SIZE];
+ uint32_t ndcb3[CMD_POOL_SIZE];
uint32_t reg_ndcr;
uint32_t ndtr0cs0;
uint32_t ndtr1cs0;
@@ -646,9 +648,9 @@ static void nand_error_dump(struct pxa3xx_nand *nand)
printk(KERN_ERR "Totally %d command for sending\n",
info->total_cmds);
for (i = 0; i < info->total_cmds; i ++)
- printk(KERN_ERR "NDCB0:%d: %x\n",
- i, info->ndcb0[i]);
- printk(KERN_ERR "NDCB1: %x; NDCB2 %x\n", info->ndcb1, info->ndcb2);
+ printk(KERN_ERR "==%d: NDCB0 %x, NDCB1 %x, NDCB2 %x, NDCB3 %x\n",
+ i, info->ndcb0[i], info->ndcb1[i],
+ info->ndcb2[i], info->ndcb3[i]);
printk(KERN_ERR "\nRegister DUMPing ##############\n");
printk(KERN_ERR "NDCR %x\n"
@@ -775,7 +777,7 @@ static void pxa3xx_nand_data_dma_irq(int channel,
void *data)
static int pxa3xx_nand_transaction(struct pxa3xx_nand *nand)
{
struct pxa3xx_nand_info *info;
- unsigned int status, is_completed = 0, cs, cmd_seqs, ndcb1, ndcb2;
+ unsigned int status, is_completed = 0, cs, cmd_seqs;
unsigned int ready, cmd_done, page_done, badblock_detect;