Target hook for disabling the delay slot filler.

Hello all,

This patch adds a target hook for disabling the eager delay slot filler which when disabled can give better code. No new regressions. Ok to commit?

Thanks,
Simon

gcc/
	* target.def (use_eager_delay_filler_p): New hook for selectively
	disabling eager delay slot filler.
	* reorg.c (dbr_schedule): Use the new hook.
	* config/mips/mips.c (mips_use_eager_delay_filler_p): New static
	function.
	(TARGET_USE_EAGER_DELAY_FILLER_P): Define.
	* doc/tm.texi.in: Add placeholder for new hook.
	* doc/tm.texi: Regenerate.

gcc/testsuite/

	* gcc.target/mips/ds-schedule-1.c: New file.
	* gcc.target/mips/ds-schedule-2.c: Likewise.

On 09/15/2015 04:19 PM, Simon Dardis wrote:
> This patch adds a target hook for disabling the eager delay slot filler which when disabled can give better code. No new regressions. Ok to commit?

Hmm. Whether a branch was filled by the simple or eager filler is an 
implementation detail - is there some better way to describe which kind 
of branch is profitable?


Bernd

On 09/15/2015 08:27 AM, Bernd Schmidt wrote:
> On 09/15/2015 04:19 PM, Simon Dardis wrote:
>> This patch adds a target hook for disabling the eager delay slot
>> filler which when disabled can give better code. No new regressions.
>> Ok to commit?
>
> Hmm. Whether a branch was filled by the simple or eager filler is an
> implementation detail - is there some better way to describe which kind
> of branch is profitable?
And more importantly, it's far better to be able to describe when it is 
not profitable to use eager filling rather than just disabling it 
completely.

Jeff

The profitability of using an ordinary branch over a delay slot branch
depends on how the delay slot is filled. If a delay slot can be filled from
an instruction preceding the branch or instructions proceeding that must be 
executed on both sides then it is profitable to use a delay slot branch.

For cases when instructions are chosen from one side of the branch, 
the proposed optimization strategy is to not speculatively execute 
instructions when ordinary branches could be used. Performance-wise
this avoids executing instructions which the eager delay filler picked
wrongly.

Since most branches have a compact form disabling the eager delay filler
should be no worse than altering it not to fill delay slots in this case.

Thanks,
Simon

-----Original Message-----
From: Jeff Law [mailto:law@redhat.com] 
Sent: 15 September 2015 16:02
To: Bernd Schmidt; Simon Dardis; gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] Target hook for disabling the delay slot filler.

On 09/15/2015 08:27 AM, Bernd Schmidt wrote:
> On 09/15/2015 04:19 PM, Simon Dardis wrote:
>> This patch adds a target hook for disabling the eager delay slot 
>> filler which when disabled can give better code. No new regressions.
>> Ok to commit?
>
> Hmm. Whether a branch was filled by the simple or eager filler is an 
> implementation detail - is there some better way to describe which 
> kind of branch is profitable?
And more importantly, it's far better to be able to describe when it is not profitable to use eager filling rather than just disabling it completely.

Jeff

On 09/17/2015 11:52 AM, Simon Dardis wrote:
> The profitability of using an ordinary branch over a delay slot branch
> depends on how the delay slot is filled. If a delay slot can be filled from
> an instruction preceding the branch or instructions proceeding that must be
> executed on both sides then it is profitable to use a delay slot branch.
>
> For cases when instructions are chosen from one side of the branch,
> the proposed optimization strategy is to not speculatively execute
> instructions when ordinary branches could be used. Performance-wise
> this avoids executing instructions which the eager delay filler picked
> wrongly.
>
> Since most branches have a compact form disabling the eager delay filler
> should be no worse than altering it not to fill delay slots in this case.

Ok, so in that case I think the patch would be reasonable if the target 
hook was named appropriately to say something like don't speculate when 
filling delay slots. It looks like fill_eager_delay_slots always 
speculates, so you needn't change your approach in reorg.c.
Possibly place the hook after rtx_cost/address_cost in target.def since 
it's cost related.


Bernd

On 09/17/2015 03:52 AM, Simon Dardis wrote:
> The profitability of using an ordinary branch over a delay slot branch
> depends on how the delay slot is filled. If a delay slot can be filled from
> an instruction preceding the branch or instructions proceeding that must be
> executed on both sides then it is profitable to use a delay slot branch.
Agreed.  It's an over-simplification, but for the purposes of this 
discussion it's close enough.


>
> For cases when instructions are chosen from one side of the branch,
> the proposed optimization strategy is to not speculatively execute
> instructions when ordinary branches could be used. Performance-wise
> this avoids executing instructions which the eager delay filler picked
> wrongly.
Are you trying to say that you have the option as to what kind of branch 
to use?  ie, "ordinary", presumably without a delay slot or one with a 
delay slot?

Is the "ordinary" actually just a nullified delay slot or some form of 
likely/not likely static hint?



>
> Since most branches have a compact form disabling the eager delay filler
> should be no worse than altering it not to fill delay slots in this case.
But what is the compact form at the micro-architectural level?  My 
mips-fu has diminished greatly, but my recollection is the bubble is 
always there.   Is that not the case?

fill_eager_delay_slots is most definitely speculative and its 
profitability is largely dependent on the cost of what insns it finds to 
fill those delay slots and whether they're from the common or uncommon path.

If it is able to find insns from the commonly executed path that don't 
have a long latency, then the fill is usually profitable (since the 
pipeline bubble always exists).  However, pulling a long latency 
instruction (say anything that might cache miss or an fdiv/fsqrt) off 
the slow path and conditionally nullifying it can be *awful*. 
Everything else is in-between.



Jeff