@@ -50,100 +50,85 @@
<0x07fff400 0x00000400>;
};
- sopc@0 {
- device_type = "soc";
- ranges;
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "altr,avalon", "simple-bus";
- bus-frequency = <125000000>;
-
- pb_cpu_to_io: bridge@0x8000000 {
- compatible = "simple-bus";
- reg = <0x08000000 0x00800000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x00002000 0x08002000 0x00002000>,
- <0x00004000 0x08004000 0x00000400>,
- <0x00004400 0x08004400 0x00000040>,
- <0x00004800 0x08004800 0x00000040>,
- <0x00004c80 0x08004c80 0x00000020>,
- <0x00004d50 0x08004d50 0x00000008>,
- <0x00008000 0x08008000 0x00000020>,
- <0x00400000 0x08400000 0x00000020>;
+ timer_1ms: timer@0x400000 {
+ compatible = "altr,timer-1.0";
+ reg = <0x08400000 0x00000020>;
+ interrupt-parent = <&cpu>;
+ interrupts = <11>;
+ clock-frequency = <125000000>;
+ };
- timer_1ms: timer@0x400000 {
- compatible = "altr,timer-1.0";
- reg = <0x00400000 0x00000020>;
- interrupt-parent = <&cpu>;
- interrupts = <11>;
- clock-frequency = <125000000>;
- };
+ timer_0: timer@0x8000 {
+ compatible = "altr,timer-1.0";
+ reg = < 0x08008000 0x00000020 >;
+ interrupt-parent = < &cpu >;
+ interrupts = < 5 >;
+ clock-frequency = < 125000000 >;
+ };
- timer_0: timer@0x8000 {
- compatible = "altr,timer-1.0";
- reg = < 0x00008000 0x00000020 >;
- interrupt-parent = < &cpu >;
- interrupts = < 5 >;
- clock-frequency = < 125000000 >;
- };
+ jtag_uart: serial@0x4d50 {
+ compatible = "altr,juart-1.0";
+ reg = <0x08004d50 0x00000008>;
+ interrupt-parent = <&cpu>;
+ interrupts = <1>;
+ };
- jtag_uart: serial@0x4d50 {
- compatible = "altr,juart-1.0";
- reg = <0x00004d50 0x00000008>;
- interrupt-parent = <&cpu>;
- interrupts = <1>;
+ tse_mac: ethernet@0x4000 {
+ compatible = "altr,tse-1.0";
+ reg = <0x08004000 0x00000400>,
+ <0x08004400 0x00000040>,
+ <0x08004800 0x00000040>,
+ <0x08002000 0x00002000>;
+ reg-names = "control_port", "rx_csr", "tx_csr", "s1";
+ interrupt-parent = <&cpu>;
+ interrupts = <2 3>;
+ interrupt-names = "rx_irq", "tx_irq";
+ rx-fifo-depth = <8192>;
+ tx-fifo-depth = <8192>;
+ max-frame-size = <1518>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ phy-mode = "rgmii-id";
+ phy-handle = <&phy0>;
+ tse_mac_mdio: mdio {
+ compatible = "altr,tse-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy0: ethernet-phy@18 {
+ reg = <18>;
+ device_type = "ethernet-phy";
};
+ };
+ };
- tse_mac: ethernet@0x4000 {
- compatible = "altr,tse-1.0";
- reg = <0x00004000 0x00000400>,
- <0x00004400 0x00000040>,
- <0x00004800 0x00000040>,
- <0x00002000 0x00002000>;
- reg-names = "control_port", "rx_csr", "tx_csr", "s1";
- interrupt-parent = <&cpu>;
- interrupts = <2 3>;
- interrupt-names = "rx_irq", "tx_irq";
- rx-fifo-depth = <8192>;
- tx-fifo-depth = <8192>;
- max-frame-size = <1518>;
- local-mac-address = [ 00 00 00 00 00 00 ];
- phy-mode = "rgmii-id";
- phy-handle = <&phy0>;
- tse_mac_mdio: mdio {
- compatible = "altr,tse-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
- phy0: ethernet-phy@18 {
- reg = <18>;
- device_type = "ethernet-phy";
- };
- };
- };
+ uart: serial@0x4c80 {
+ compatible = "altr,uart-1.0";
+ reg = <0x08004c80 0x00000020>;
+ interrupt-parent = <&cpu>;
+ interrupts = <10>;
+ current-speed = <115200>;
+ clock-frequency = <62500000>;
+ };
- uart: serial@0x4c80 {
- compatible = "altr,uart-1.0";
- reg = <0x00004c80 0x00000020>;
- interrupt-parent = <&cpu>;
- interrupts = <10>;
- current-speed = <115200>;
- clock-frequency = <62500000>;
- };
- };
+ user_led_pio_8out: gpio@0x4cc0 {
+ compatible = "altr,pio-1.0";
+ reg = <0x08004cc0 0x00000010>;
+ resetvalue = <255>;
+ width = <8>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
- cfi_flash_64m: flash@0x0 {
- compatible = "cfi-flash";
- reg = <0x00000000 0x04000000>;
- bank-width = <2>;
- device-width = <1>;
- #address-cells = <1>;
- #size-cells = <1>;
+ cfi_flash_64m: flash@0x0 {
+ compatible = "cfi-flash";
+ reg = <0x00000000 0x04000000>;
+ bank-width = <2>;
+ device-width = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
- partition@800000 {
- reg = <0x00800000 0x01e00000>;
- label = "JFFS2 Filesystem";
- };
+ partition@800000 {
+ reg = <0x00800000 0x01e00000>;
+ label = "JFFS2 Filesystem";
};
};
As the device tree handlers in driver model does not translate address across bridges, we would remove the bridges in device tree and translate the reg address. We want to use the same device tree for both u-boot and linux. The ioremap() should be used to map the address returned from dev_get_addr(). Signed-off-by: Thomas Chou <thomas@wytron.com.tw> --- arch/nios2/dts/3c120_devboard.dts | 157 +++++++++++++++++--------------------- 1 file changed, 71 insertions(+), 86 deletions(-)