| Message ID | 1441936878-18290-4-git-send-email-horms+renesas@verge.net.au |
|---|---|
| State | RFC, archived |
| Delegated to: | David Miller |
| Headers | show |
Hi Simon, On Fri, Sep 11, 2015 at 4:01 AM, Simon Horman <horms+renesas@verge.net.au> wrote: > --- a/Documentation/devicetree/bindings/net/renesas,ravb.txt > +++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt > @@ -6,8 +6,11 @@ interface contains. > Required properties: > - compatible: "renesas,etheravb-r8a7790" if the device is a part of R8A7790 SoC. > "renesas,etheravb-r8a7794" if the device is a part of R8A7794 SoC. > + "renesas,etheravb-r8a7795" if the device is a part of R8A7795 SoC. > - reg: offset and length of (1) the register block and (2) the stream buffer. > -- interrupts: interrupt specifier for the sole interrupt. > +- interrupts: interrupt specifiers. > + One for each entry in interrupt-names the R8A7795 SoC; ... for the R8A7795 SoC > + One entry for a multiplexed interrupt otherwise. > - phy-mode: see ethernet.txt file in the same directory. > - phy-handle: see ethernet.txt file in the same directory. > - #address-cells: number of address cells for the MDIO bus, must be equal to 1. > @@ -18,6 +21,9 @@ Required properties: > Optional properties: > - interrupt-parent: the phandle for the interrupt controller that services > interrupts for this device. > +- interrupt-names: One entry per interrupt named "ch%u". > + For the R8A7795 SoC this property is mandatory, > + and "ch0" through "ch24" are mandatory. This suggests the single multiplexed interrupt on R-Car Gen2 can be called "ch0". Is that what you want? I know the driver doesn't care. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Sep 11, 2015 at 09:12:17AM +0200, Geert Uytterhoeven wrote: > Hi Simon, > > On Fri, Sep 11, 2015 at 4:01 AM, Simon Horman > <horms+renesas@verge.net.au> wrote: > > --- a/Documentation/devicetree/bindings/net/renesas,ravb.txt > > +++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt > > @@ -6,8 +6,11 @@ interface contains. > > Required properties: > > - compatible: "renesas,etheravb-r8a7790" if the device is a part of R8A7790 SoC. > > "renesas,etheravb-r8a7794" if the device is a part of R8A7794 SoC. > > + "renesas,etheravb-r8a7795" if the device is a part of R8A7795 SoC. > > - reg: offset and length of (1) the register block and (2) the stream buffer. > > -- interrupts: interrupt specifier for the sole interrupt. > > +- interrupts: interrupt specifiers. > > + One for each entry in interrupt-names the R8A7795 SoC; > > ... for the R8A7795 SoC > > > + One entry for a multiplexed interrupt otherwise. > > - phy-mode: see ethernet.txt file in the same directory. > > - phy-handle: see ethernet.txt file in the same directory. > > - #address-cells: number of address cells for the MDIO bus, must be equal to 1. > > @@ -18,6 +21,9 @@ Required properties: > > Optional properties: > > - interrupt-parent: the phandle for the interrupt controller that services > > interrupts for this device. > > +- interrupt-names: One entry per interrupt named "ch%u". > > + For the R8A7795 SoC this property is mandatory, > > + and "ch0" through "ch24" are mandatory. > > This suggests the single multiplexed interrupt on R-Car Gen2 can be called > "ch0". Is that what you want? I know the driver doesn't care. No, its not what I intended. I think its reasonable to allow the multiplexed interrupt to be named, but to what I wonder. The documentation seems to call the interrupt "EthernetAVB", which isn't very exciting. -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Simon, On Fri, Sep 11, 2015 at 10:14 AM, Simon Horman <horms@verge.net.au> wrote: >> > @@ -18,6 +21,9 @@ Required properties: >> > Optional properties: >> > - interrupt-parent: the phandle for the interrupt controller that services >> > interrupts for this device. >> > +- interrupt-names: One entry per interrupt named "ch%u". >> > + For the R8A7795 SoC this property is mandatory, >> > + and "ch0" through "ch24" are mandatory. >> >> This suggests the single multiplexed interrupt on R-Car Gen2 can be called >> "ch0". Is that what you want? I know the driver doesn't care. > > No, its not what I intended. > > I think its reasonable to allow the multiplexed interrupt to be named, > but to what I wonder. The documentation seems to call the interrupt > "EthernetAVB", which isn't very exciting. Perhaps "mux", like I did for rspi, cfr. Documentation/devicetree/bindings/spi/spi-rspi.txt: - interrupts : A list of interrupt-specifiers, one for each entry in interrupt-names. If interrupt-names is not present, an interrupt specifier for a single muxed interrupt. - interrupt-names : A list of interrupt names. Should contain (if present): - "error" for SPEI, - "rx" for SPRI, - "tx" to SPTI, - "mux" for a single muxed interrupt. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Sep 11, 2015 at 10:41:31AM +0200, Geert Uytterhoeven wrote: > Hi Simon, > > On Fri, Sep 11, 2015 at 10:14 AM, Simon Horman <horms@verge.net.au> wrote: > >> > @@ -18,6 +21,9 @@ Required properties: > >> > Optional properties: > >> > - interrupt-parent: the phandle for the interrupt controller that services > >> > interrupts for this device. > >> > +- interrupt-names: One entry per interrupt named "ch%u". > >> > + For the R8A7795 SoC this property is mandatory, > >> > + and "ch0" through "ch24" are mandatory. > >> > >> This suggests the single multiplexed interrupt on R-Car Gen2 can be called > >> "ch0". Is that what you want? I know the driver doesn't care. > > > > No, its not what I intended. > > > > I think its reasonable to allow the multiplexed interrupt to be named, > > but to what I wonder. The documentation seems to call the interrupt > > "EthernetAVB", which isn't very exciting. > > Perhaps "mux", like I did for rspi, cfr. > Documentation/devicetree/bindings/spi/spi-rspi.txt: > > - interrupts : A list of interrupt-specifiers, one for each entry in > interrupt-names. > If interrupt-names is not present, an interrupt specifier > for a single muxed interrupt. > - interrupt-names : A list of interrupt names. Should contain (if present): > - "error" for SPEI, > - "rx" for SPRI, > - "tx" to SPTI, > - "mux" for a single muxed interrupt. Thanks for for that example. "mux" sounds good to me. -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hello. On 9/11/2015 5:01 AM, Simon Horman wrote: > From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com> > > This patch updates the ravb binding to support the r8a7795 SoC by: > - Adding a compat string for the new hardware > - Adding 25 named interrupts to binding for the new SoC; > older SoCs continue to use a single multiplexed interrupt > > The example is also updated to reflect the r8a7795 as this is the > more complex case. > > Based on work by Kazuya Mizuguchi and others. > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> > > --- > > v2 > * First post; broken out of a driver update patch > * As discussed with Geert Uytterhoeven and Sergei Shtylyov > - Binding: Make all interrupts mandatory as named-interrupts of > the form ch%u > --- > .../devicetree/bindings/net/renesas,ravb.txt | 65 +++++++++++++++++++--- > 1 file changed, 58 insertions(+), 7 deletions(-) > > diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt > index 1fd8831437bf..6c360f993d33 100644 > --- a/Documentation/devicetree/bindings/net/renesas,ravb.txt > +++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt [...] > @@ -27,13 +33,46 @@ Optional properties: > Example: > > ethernet@e6800000 { > - compatible = "renesas,etheravb-r8a7790"; > - reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; > + compatible = "renesas,etheravb-r8a7795"; > + reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; > interrupt-parent = <&gic>; > - interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>; > - phy-mode = "rmii"; > + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "ch0", "ch1", "ch2", "ch3", > + "ch4", "ch5", "ch6", "ch7", > + "ch8", "ch9", "ch10", "ch11", > + "ch12", "ch13", "ch14", "ch15", > + "ch16", "ch17", "ch18", "ch19", > + "ch20", "ch21", "ch22", "ch23", > + "ch24"; To me, these names don't look very helpful. You could as well omit them and use platform_get_irq() with the channel #. > + clocks = <&mstp8_clks R8A7795_CLK_ETHERAVB>; > + phy-mode = "rgmii-id"; > + phy-reset-gpio = <&gpio2 10 0>; I don't see how this prop is used by the driver and it's not documented in the bindings. [...] MBR, Sergei -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Sep 11, 2015 at 05:25:17PM +0300, Sergei Shtylyov wrote: > Hello. > > On 9/11/2015 5:01 AM, Simon Horman wrote: > > >From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com> > > > >This patch updates the ravb binding to support the r8a7795 SoC by: > >- Adding a compat string for the new hardware > >- Adding 25 named interrupts to binding for the new SoC; > > older SoCs continue to use a single multiplexed interrupt > > > >The example is also updated to reflect the r8a7795 as this is the > >more complex case. > > > >Based on work by Kazuya Mizuguchi and others. > > > >Signed-off-by: Simon Horman <horms+renesas@verge.net.au> > > > >--- > > > >v2 > >* First post; broken out of a driver update patch > >* As discussed with Geert Uytterhoeven and Sergei Shtylyov > > - Binding: Make all interrupts mandatory as named-interrupts of > > the form ch%u > >--- > > .../devicetree/bindings/net/renesas,ravb.txt | 65 +++++++++++++++++++--- > > 1 file changed, 58 insertions(+), 7 deletions(-) > > > >diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt > >index 1fd8831437bf..6c360f993d33 100644 > >--- a/Documentation/devicetree/bindings/net/renesas,ravb.txt > >+++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt > [...] > >@@ -27,13 +33,46 @@ Optional properties: > > Example: > > > > ethernet@e6800000 { > >- compatible = "renesas,etheravb-r8a7790"; > >- reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; > >+ compatible = "renesas,etheravb-r8a7795"; > >+ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; > > interrupt-parent = <&gic>; > >- interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>; > >- clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>; > >- phy-mode = "rmii"; > >+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, > >+ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; > >+ interrupt-names = "ch0", "ch1", "ch2", "ch3", > >+ "ch4", "ch5", "ch6", "ch7", > >+ "ch8", "ch9", "ch10", "ch11", > >+ "ch12", "ch13", "ch14", "ch15", > >+ "ch16", "ch17", "ch18", "ch19", > >+ "ch20", "ch21", "ch22", "ch23", > >+ "ch24"; > > To me, these names don't look very helpful. You could as well omit them > and use platform_get_irq() with the channel #. These names reflect the hardware; which is the aim of DT. As I believe you pointed out earlier it is preferred to use named interrupts when there is more than one. Do I misunderstand the situation there? If you have a positive contribution to make regarding better names then I am all ears. > >+ clocks = <&mstp8_clks R8A7795_CLK_ETHERAVB>; > >+ phy-mode = "rgmii-id"; > >+ phy-reset-gpio = <&gpio2 10 0>; > > I don't see how this prop is used by the driver and it's not documented > in the bindings. Thanks for pointing that out. It looks like I should remove phy-reset-gpio. -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hello.
On 09/14/2015 03:42 AM, Simon Horman wrote:
Sorry for delayed reply, I thought I'd already replied to this. :-/
>>> From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
>>>
>>> This patch updates the ravb binding to support the r8a7795 SoC by:
>>> - Adding a compat string for the new hardware
>>> - Adding 25 named interrupts to binding for the new SoC;
>>> older SoCs continue to use a single multiplexed interrupt
>>>
>>> The example is also updated to reflect the r8a7795 as this is the
>>> more complex case.
>>>
>>> Based on work by Kazuya Mizuguchi and others.
>>>
>>> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>>>
>>> ---
>>>
>>> v2
>>> * First post; broken out of a driver update patch
>>> * As discussed with Geert Uytterhoeven and Sergei Shtylyov
>>> - Binding: Make all interrupts mandatory as named-interrupts of
>>> the form ch%u
>>> ---
>>> .../devicetree/bindings/net/renesas,ravb.txt | 65 +++++++++++++++++++---
>>> 1 file changed, 58 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt
>>> index 1fd8831437bf..6c360f993d33 100644
>>> --- a/Documentation/devicetree/bindings/net/renesas,ravb.txt
>>> +++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt
>> [...]
>>> @@ -27,13 +33,46 @@ Optional properties:
>>> Example:
>>>
>>> ethernet@e6800000 {
>>> - compatible = "renesas,etheravb-r8a7790";
>>> - reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
>>> + compatible = "renesas,etheravb-r8a7795";
>>> + reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
>>> interrupt-parent = <&gic>;
>>> - interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>;
>>> - clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>;
>>> - phy-mode = "rmii";
>>> + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
>>> + interrupt-names = "ch0", "ch1", "ch2", "ch3",
>>> + "ch4", "ch5", "ch6", "ch7",
>>> + "ch8", "ch9", "ch10", "ch11",
>>> + "ch12", "ch13", "ch14", "ch15",
>>> + "ch16", "ch17", "ch18", "ch19",
>>> + "ch20", "ch21", "ch22", "ch23",
>>> + "ch24";
>>
>> To me, these names don't look very helpful. You could as well omit them
>> and use platform_get_irq() with the channel #.
> These names reflect the hardware; which is the aim of DT.
Indeed (I've looked into the manuals by now). They just look poorly
chosen. :-)
> As I believe you pointed out earlier it is preferred to use named
> interrupts when there is more than one. Do I misunderstand the situation
> there?
Yes.
> If you have a positive contribution to make regarding better names then
> I am all ears.
I liked your "tx<n>", "rx<n>" variant better...
MBR, Sergei
--
To unsubscribe from this list: send the line "unsubscribe netdev" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt index 1fd8831437bf..6c360f993d33 100644 --- a/Documentation/devicetree/bindings/net/renesas,ravb.txt +++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt @@ -6,8 +6,11 @@ interface contains. Required properties: - compatible: "renesas,etheravb-r8a7790" if the device is a part of R8A7790 SoC. "renesas,etheravb-r8a7794" if the device is a part of R8A7794 SoC. + "renesas,etheravb-r8a7795" if the device is a part of R8A7795 SoC. - reg: offset and length of (1) the register block and (2) the stream buffer. -- interrupts: interrupt specifier for the sole interrupt. +- interrupts: interrupt specifiers. + One for each entry in interrupt-names the R8A7795 SoC; + One entry for a multiplexed interrupt otherwise. - phy-mode: see ethernet.txt file in the same directory. - phy-handle: see ethernet.txt file in the same directory. - #address-cells: number of address cells for the MDIO bus, must be equal to 1. @@ -18,6 +21,9 @@ Required properties: Optional properties: - interrupt-parent: the phandle for the interrupt controller that services interrupts for this device. +- interrupt-names: One entry per interrupt named "ch%u". + For the R8A7795 SoC this property is mandatory, + and "ch0" through "ch24" are mandatory. - pinctrl-names: pin configuration state name ("default"). - renesas,no-ether-link: boolean, specify when a board does not provide a proper AVB_LINK signal. @@ -27,13 +33,46 @@ Optional properties: Example: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a7790"; - reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; + compatible = "renesas,etheravb-r8a7795"; + reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; interrupt-parent = <&gic>; - interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>; - phy-mode = "rmii"; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15", + "ch16", "ch17", "ch18", "ch19", + "ch20", "ch21", "ch22", "ch23", + "ch24"; + clocks = <&mstp8_clks R8A7795_CLK_ETHERAVB>; + phy-mode = "rgmii-id"; + phy-reset-gpio = <&gpio2 10 0>; phy-handle = <&phy0>; + pinctrl-0 = <ðer_pins>; pinctrl-names = "default"; renesas,no-ether-link; @@ -41,8 +80,20 @@ Example: #size-cells = <0>; phy0: ethernet-phy@0 { + rxc-skew-ps = <900>; + rxdv-skew-ps = <0>; + rxd0-skew-ps = <0>; + rxd1-skew-ps = <0>; + rxd2-skew-ps = <0>; + rxd3-skew-ps = <0>; + txc-skew-ps = <900>; + txen-skew-ps = <0>; + txd0-skew-ps = <0>; + txd1-skew-ps = <0>; + txd2-skew-ps = <0>; + txd3-skew-ps = <0>; reg = <0>; interrupt-parent = <&gpio2>; - interrupts = <15 IRQ_TYPE_LEVEL_LOW>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; }; };