pinctrl: sh-pfc: r8a7791/r8a7793: Correct SCIFB1_B SCK MOD_SEL value
diff mbox

Message ID 1441887423-18743-1-git-send-email-geert+renesas@glider.be
State New
Headers show

Commit Message

Geert Uytterhoeven Sept. 10, 2015, 12:17 p.m. UTC
When using serial port SCIFB1_B, transmit works, but nothing is
received.

Receive fails because the SCIFB1_SCK_B settings configure the wrong
value for the sel_scifb1 field in the Module Select Register (MOD_SEL),
due to an ambiguity in the R-Car M2-W and M2-N datasheets.

Tested on r8a7791/koelsch using pins 53 (TXD) and 72 (RXD) on EXIO
Connector A.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Against next-20150910.

s/PINMUX_IPSR_MODSEL_DATA/PINMUX_IPSR_MSEL/ to apply on
renesas-drivers-2015-09-08-v4.2.

 drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Linus Walleij Sept. 25, 2015, 5:18 p.m. UTC | #1
On Thu, Sep 10, 2015 at 5:17 AM, Geert Uytterhoeven
<geert+renesas@glider.be> wrote:

> When using serial port SCIFB1_B, transmit works, but nothing is
> received.
>
> Receive fails because the SCIFB1_SCK_B settings configure the wrong
> value for the sel_scifb1 field in the Module Select Register (MOD_SEL),
> due to an ambiguity in the R-Car M2-W and M2-N datasheets.
>
> Tested on r8a7791/koelsch using pins 53 (TXD) and 72 (RXD) on EXIO
> Connector A.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Against next-20150910.
>
> s/PINMUX_IPSR_MODSEL_DATA/PINMUX_IPSR_MSEL/ to apply on
> renesas-drivers-2015-09-08-v4.2.

Acked-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij
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Patch
diff mbox

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
index ee41eb10ef3636d7..622841954f4b9ab4 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
@@ -889,7 +889,7 @@  static const u16 pinmux_data[] = {
 	PINMUX_IPSR_DATA(IP2_2_0, DACK1),
 	PINMUX_IPSR_MODSEL_DATA(IP2_2_0, SCIFA1_TXD_C, SEL_SCIFA1_2),
 	PINMUX_IPSR_MODSEL_DATA(IP2_2_0, SCIFB1_TXD_C, SEL_SCIFB1_2),
-	PINMUX_IPSR_MODSEL_DATA(IP2_2_0, SCIFB1_SCK_B, SEL_SCIFB1_0),
+	PINMUX_IPSR_MODSEL_DATA(IP2_2_0, SCIFB1_SCK_B, SEL_SCIFB1_1),
 	PINMUX_IPSR_DATA(IP2_2_0, A20),
 	PINMUX_IPSR_MODSEL_DATA(IP2_4_3, SPCLK, SEL_QSP_0),
 	PINMUX_IPSR_DATA(IP2_6_5, A21),