| Message ID | 1441678438-2257-1-git-send-email-clsee@altera.com |
|---|---|
| State | Deferred |
| Delegated to: | Marek Vasut |
| Headers | show
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diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 38ae763..2a2fdc5 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -155,8 +155,6 @@ #define CONFIG_DWMMC #define CONFIG_SOCFPGA_DWMMC #define CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH 1024 -#define CONFIG_SOCFPGA_DWMMC_DRVSEL 3 -#define CONFIG_SOCFPGA_DWMMC_SMPSEL 0 /* FIXME */ /* using smaller max blk cnt to avoid flooding the limited stack we have */ #define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 /* FIXME -- SPL only? */
Remove hard-coded SDMMC timing parameter drvsel and smplsel. This setting now will come from SDMMC calibration Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> --- include/configs/socfpga_common.h | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-)