From patchwork Wed Sep 2 07:47:01 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 513332 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 7330B1400A0 for ; Wed, 2 Sep 2015 17:47:11 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751776AbbIBHrK (ORCPT ); Wed, 2 Sep 2015 03:47:10 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:22016 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751592AbbIBHrI (ORCPT ); Wed, 2 Sep 2015 03:47:08 -0400 Received: from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151]) by relmlie2.idc.renesas.com with ESMTP; 02 Sep 2015 16:47:07 +0900 Received: from relmlac3.idc.renesas.com (relmlac3.idc.renesas.com [10.200.69.23]) by relmlir1.idc.renesas.com (Postfix) with ESMTP id 1430A4DD16; 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Wed, 2 Sep 2015 07:47:01 +0000 Message-ID: <87d1y1jmgn.wl%kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto To: Linus Walleij , Laurent Pinchart CC: Simon , Magnus , "linux-gpio@vger.kernel.org" , "linux-sh@vger.kernel.org" Subject: [PATCH 5/9] sh-pfc: pfc-r8a7790: use PINMUX_IPSR_MSEL() In-Reply-To: <87wpw9jn3i.wl%kuninori.morimoto.gx@renesas.com> References: <87wpw9jn3i.wl%kuninori.morimoto.gx@renesas.com> User-Agent: Wanderlust/2.15.9 Emacs/24.3 Mule/6.0 MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Date: Wed, 2 Sep 2015 07:47:01 +0000 X-Originating-IP: [211.11.155.144] X-ClientProxiedBy: OS1PR01CA0035.jpnprd01.prod.outlook.com (25.164.162.19) To HK2PR06MB0596.apcprd06.prod.outlook.com (25.161.187.147) X-Microsoft-Exchange-Diagnostics: 1; HK2PR06MB0596; 2:6+p9lFhjJjwH6UM5RgDyH67Vhiacp+sr2A1PBvzxsNAg+MjUfh+tNOpWkapKjYw7aTeOdgQcqvTPVVwRHJjoMbOH3m7V2jyPt+YracwP/q8JAY0usyzmQu5D65+z4Jo5jvvf4MQhfJOQS2xSybloVGlvc6obVjVSmzH11EWHBVs=; 3:ZYD6Ovsi7rVwK2Z1x6TJCUll8A6XyjEicOrTYKDCYKhQqeYIoOg4bgdLLtvUMutnPUZDBB1Bm6dwDwQ1CX8gf5zF5JEVCZI/s2bFBs85R5bTuSqW1MduMhESneHtmeMG2KEFVHyCjkU7l021cW0Snw==; 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Current PFC driver is very difficult to read, because macro names are using different lenth. PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) PINMUX_IPSR_MODSEL_DATA(ipsr, ...) It can be readable if we can use PINMUX_IPSR_MSEL() instead of PINMUX_IPSR_MODSEL_DATA() PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) Signed-off-by: Kuninori Morimoto --- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 1038 +++++++++++++++++----------------- 1 file changed, 519 insertions(+), 519 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index fc344a7..77a1493 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c @@ -818,103 +818,103 @@ static const u16 pinmux_data[] = { PINMUX_DATA(DU_DOTCLKIN2_MARK, FN_DU_DOTCLKIN2), PINMUX_IPSR_DATA(IP0_2_0, D0), - PINMUX_IPSR_MODSEL_DATA(IP0_2_0, MSIOF3_SCK_B, SEL_SOF3_1), - PINMUX_IPSR_MODSEL_DATA(IP0_2_0, VI3_DATA0, SEL_VI3_0), - PINMUX_IPSR_MODSEL_DATA(IP0_2_0, VI0_G4, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP0_2_0, VI0_G4_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP0_2_0, MSIOF3_SCK_B, SEL_SOF3_1), + PINMUX_IPSR_MSEL(IP0_2_0, VI3_DATA0, SEL_VI3_0), + PINMUX_IPSR_MSEL(IP0_2_0, VI0_G4, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP0_2_0, VI0_G4_B, SEL_VI0_1), PINMUX_IPSR_DATA(IP0_5_3, D1), - PINMUX_IPSR_MODSEL_DATA(IP0_5_3, MSIOF3_SYNC_B, SEL_SOF3_1), - PINMUX_IPSR_MODSEL_DATA(IP0_5_3, VI3_DATA1, SEL_VI3_0), - PINMUX_IPSR_MODSEL_DATA(IP0_5_3, VI0_G5, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP0_5_3, VI0_G5_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP0_5_3, MSIOF3_SYNC_B, SEL_SOF3_1), + PINMUX_IPSR_MSEL(IP0_5_3, VI3_DATA1, SEL_VI3_0), + PINMUX_IPSR_MSEL(IP0_5_3, VI0_G5, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP0_5_3, VI0_G5_B, SEL_VI0_1), PINMUX_IPSR_DATA(IP0_8_6, D2), - PINMUX_IPSR_MODSEL_DATA(IP0_8_6, MSIOF3_RXD_B, SEL_SOF3_1), - PINMUX_IPSR_MODSEL_DATA(IP0_8_6, VI3_DATA2, SEL_VI3_0), - PINMUX_IPSR_MODSEL_DATA(IP0_8_6, VI0_G6, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP0_8_6, VI0_G6_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP0_8_6, MSIOF3_RXD_B, SEL_SOF3_1), + PINMUX_IPSR_MSEL(IP0_8_6, VI3_DATA2, SEL_VI3_0), + PINMUX_IPSR_MSEL(IP0_8_6, VI0_G6, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP0_8_6, VI0_G6_B, SEL_VI0_1), PINMUX_IPSR_DATA(IP0_11_9, D3), - PINMUX_IPSR_MODSEL_DATA(IP0_11_9, MSIOF3_TXD_B, SEL_SOF3_1), - PINMUX_IPSR_MODSEL_DATA(IP0_11_9, VI3_DATA3, SEL_VI3_0), - PINMUX_IPSR_MODSEL_DATA(IP0_11_9, VI0_G7, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP0_11_9, VI0_G7_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP0_11_9, MSIOF3_TXD_B, SEL_SOF3_1), + PINMUX_IPSR_MSEL(IP0_11_9, VI3_DATA3, SEL_VI3_0), + PINMUX_IPSR_MSEL(IP0_11_9, VI0_G7, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP0_11_9, VI0_G7_B, SEL_VI0_1), PINMUX_IPSR_DATA(IP0_15_12, D4), - PINMUX_IPSR_MODSEL_DATA(IP0_15_12, SCIFB1_RXD_F, SEL_SCIFB1_5), - PINMUX_IPSR_MODSEL_DATA(IP0_15_12, SCIFB0_RXD_C, SEL_SCIFB_2), - PINMUX_IPSR_MODSEL_DATA(IP0_15_12, VI3_DATA4, SEL_VI3_0), - PINMUX_IPSR_MODSEL_DATA(IP0_15_12, VI0_R0, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP0_15_12, VI0_R0_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP0_15_12, RX0_B, SEL_SCIF0_1), + PINMUX_IPSR_MSEL(IP0_15_12, SCIFB1_RXD_F, SEL_SCIFB1_5), + PINMUX_IPSR_MSEL(IP0_15_12, SCIFB0_RXD_C, SEL_SCIFB_2), + PINMUX_IPSR_MSEL(IP0_15_12, VI3_DATA4, SEL_VI3_0), + PINMUX_IPSR_MSEL(IP0_15_12, VI0_R0, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP0_15_12, VI0_R0_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP0_15_12, RX0_B, SEL_SCIF0_1), PINMUX_IPSR_DATA(IP0_19_16, D5), - PINMUX_IPSR_MODSEL_DATA(IP0_19_16, SCIFB1_TXD_F, SEL_SCIFB1_5), - PINMUX_IPSR_MODSEL_DATA(IP0_19_16, SCIFB0_TXD_C, SEL_SCIFB_2), - PINMUX_IPSR_MODSEL_DATA(IP0_19_16, VI3_DATA5, SEL_VI3_0), - PINMUX_IPSR_MODSEL_DATA(IP0_19_16, VI0_R1, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP0_19_16, VI0_R1_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP0_19_16, TX0_B, SEL_SCIF0_1), + PINMUX_IPSR_MSEL(IP0_19_16, SCIFB1_TXD_F, SEL_SCIFB1_5), + PINMUX_IPSR_MSEL(IP0_19_16, SCIFB0_TXD_C, SEL_SCIFB_2), + PINMUX_IPSR_MSEL(IP0_19_16, VI3_DATA5, SEL_VI3_0), + PINMUX_IPSR_MSEL(IP0_19_16, VI0_R1, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP0_19_16, VI0_R1_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP0_19_16, TX0_B, SEL_SCIF0_1), PINMUX_IPSR_DATA(IP0_22_20, D6), - PINMUX_IPSR_MODSEL_DATA(IP0_22_20, IIC2_SCL_C, SEL_IIC2_2), - PINMUX_IPSR_MODSEL_DATA(IP0_22_20, VI3_DATA6, SEL_VI3_0), - PINMUX_IPSR_MODSEL_DATA(IP0_22_20, VI0_R2, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP0_22_20, VI0_R2_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP0_22_20, I2C2_SCL_C, SEL_I2C2_2), + PINMUX_IPSR_MSEL(IP0_22_20, IIC2_SCL_C, SEL_IIC2_2), + PINMUX_IPSR_MSEL(IP0_22_20, VI3_DATA6, SEL_VI3_0), + PINMUX_IPSR_MSEL(IP0_22_20, VI0_R2, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP0_22_20, VI0_R2_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP0_22_20, I2C2_SCL_C, SEL_I2C2_2), PINMUX_IPSR_DATA(IP0_26_23, D7), - PINMUX_IPSR_MODSEL_DATA(IP0_26_23, AD_DI_B, SEL_ADI_1), - PINMUX_IPSR_MODSEL_DATA(IP0_26_23, IIC2_SDA_C, SEL_IIC2_2), - PINMUX_IPSR_MODSEL_DATA(IP0_26_23, VI3_DATA7, SEL_VI3_0), - PINMUX_IPSR_MODSEL_DATA(IP0_26_23, VI0_R3, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP0_26_23, VI0_R3_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP0_26_23, I2C2_SDA_C, SEL_I2C2_2), - PINMUX_IPSR_MODSEL_DATA(IP0_26_23, TCLK1, SEL_TMU1_0), + PINMUX_IPSR_MSEL(IP0_26_23, AD_DI_B, SEL_ADI_1), + PINMUX_IPSR_MSEL(IP0_26_23, IIC2_SDA_C, SEL_IIC2_2), + PINMUX_IPSR_MSEL(IP0_26_23, VI3_DATA7, SEL_VI3_0), + PINMUX_IPSR_MSEL(IP0_26_23, VI0_R3, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP0_26_23, VI0_R3_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP0_26_23, I2C2_SDA_C, SEL_I2C2_2), + PINMUX_IPSR_MSEL(IP0_26_23, TCLK1, SEL_TMU1_0), PINMUX_IPSR_DATA(IP0_30_27, D8), - PINMUX_IPSR_MODSEL_DATA(IP0_30_27, SCIFA1_SCK_C, SEL_SCIFA1_2), + PINMUX_IPSR_MSEL(IP0_30_27, SCIFA1_SCK_C, SEL_SCIFA1_2), PINMUX_IPSR_DATA(IP0_30_27, AVB_TXD0), - PINMUX_IPSR_MODSEL_DATA(IP0_30_27, VI0_G0, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP0_30_27, VI0_G0_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP0_30_27, VI2_DATA0_VI2_B0, SEL_VI2_0), + PINMUX_IPSR_MSEL(IP0_30_27, VI0_G0, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP0_30_27, VI0_G0_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP0_30_27, VI2_DATA0_VI2_B0, SEL_VI2_0), PINMUX_IPSR_DATA(IP1_3_0, D9), - PINMUX_IPSR_MODSEL_DATA(IP1_3_0, SCIFA1_RXD_C, SEL_SCIFA1_2), + PINMUX_IPSR_MSEL(IP1_3_0, SCIFA1_RXD_C, SEL_SCIFA1_2), PINMUX_IPSR_DATA(IP1_3_0, AVB_TXD1), - PINMUX_IPSR_MODSEL_DATA(IP1_3_0, VI0_G1, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP1_3_0, VI0_G1_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP1_3_0, VI2_DATA1_VI2_B1, SEL_VI2_0), + PINMUX_IPSR_MSEL(IP1_3_0, VI0_G1, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP1_3_0, VI0_G1_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP1_3_0, VI2_DATA1_VI2_B1, SEL_VI2_0), PINMUX_IPSR_DATA(IP1_7_4, D10), - PINMUX_IPSR_MODSEL_DATA(IP1_7_4, SCIFA1_TXD_C, SEL_SCIFA1_2), + PINMUX_IPSR_MSEL(IP1_7_4, SCIFA1_TXD_C, SEL_SCIFA1_2), PINMUX_IPSR_DATA(IP1_7_4, AVB_TXD2), - PINMUX_IPSR_MODSEL_DATA(IP1_7_4, VI0_G2, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP1_7_4, VI0_G2_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP1_7_4, VI2_DATA2_VI2_B2, SEL_VI2_0), + PINMUX_IPSR_MSEL(IP1_7_4, VI0_G2, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP1_7_4, VI0_G2_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP1_7_4, VI2_DATA2_VI2_B2, SEL_VI2_0), PINMUX_IPSR_DATA(IP1_11_8, D11), - PINMUX_IPSR_MODSEL_DATA(IP1_11_8, SCIFA1_CTS_N_C, SEL_SCIFA1_2), + PINMUX_IPSR_MSEL(IP1_11_8, SCIFA1_CTS_N_C, SEL_SCIFA1_2), PINMUX_IPSR_DATA(IP1_11_8, AVB_TXD3), - PINMUX_IPSR_MODSEL_DATA(IP1_11_8, VI0_G3, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP1_11_8, VI0_G3_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP1_11_8, VI2_DATA3_VI2_B3, SEL_VI2_0), + PINMUX_IPSR_MSEL(IP1_11_8, VI0_G3, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP1_11_8, VI0_G3_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP1_11_8, VI2_DATA3_VI2_B3, SEL_VI2_0), PINMUX_IPSR_DATA(IP1_14_12, D12), - PINMUX_IPSR_MODSEL_DATA(IP1_14_12, SCIFA1_RTS_N_C, SEL_SCIFA1_2), + PINMUX_IPSR_MSEL(IP1_14_12, SCIFA1_RTS_N_C, SEL_SCIFA1_2), PINMUX_IPSR_DATA(IP1_14_12, AVB_TXD4), - PINMUX_IPSR_MODSEL_DATA(IP1_14_12, VI0_HSYNC_N, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP1_14_12, VI0_HSYNC_N_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP1_14_12, VI2_DATA4_VI2_B4, SEL_VI2_0), + PINMUX_IPSR_MSEL(IP1_14_12, VI0_HSYNC_N, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP1_14_12, VI0_HSYNC_N_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP1_14_12, VI2_DATA4_VI2_B4, SEL_VI2_0), PINMUX_IPSR_DATA(IP1_17_15, D13), PINMUX_IPSR_DATA(IP1_17_15, AVB_TXD5), - PINMUX_IPSR_MODSEL_DATA(IP1_17_15, VI0_VSYNC_N, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP1_17_15, VI0_VSYNC_N_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP1_17_15, VI2_DATA5_VI2_B5, SEL_VI2_0), + PINMUX_IPSR_MSEL(IP1_17_15, VI0_VSYNC_N, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP1_17_15, VI0_VSYNC_N_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP1_17_15, VI2_DATA5_VI2_B5, SEL_VI2_0), PINMUX_IPSR_DATA(IP1_21_18, D14), - PINMUX_IPSR_MODSEL_DATA(IP1_21_18, SCIFB1_RXD_C, SEL_SCIFB1_2), + PINMUX_IPSR_MSEL(IP1_21_18, SCIFB1_RXD_C, SEL_SCIFB1_2), PINMUX_IPSR_DATA(IP1_21_18, AVB_TXD6), - PINMUX_IPSR_MODSEL_DATA(IP1_21_18, RX1_B, SEL_SCIF1_1), - PINMUX_IPSR_MODSEL_DATA(IP1_21_18, VI0_CLKENB, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP1_21_18, VI0_CLKENB_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP1_21_18, VI2_DATA6_VI2_B6, SEL_VI2_0), + PINMUX_IPSR_MSEL(IP1_21_18, RX1_B, SEL_SCIF1_1), + PINMUX_IPSR_MSEL(IP1_21_18, VI0_CLKENB, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP1_21_18, VI0_CLKENB_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP1_21_18, VI2_DATA6_VI2_B6, SEL_VI2_0), PINMUX_IPSR_DATA(IP1_25_22, D15), - PINMUX_IPSR_MODSEL_DATA(IP1_25_22, SCIFB1_TXD_C, SEL_SCIFB1_2), + PINMUX_IPSR_MSEL(IP1_25_22, SCIFB1_TXD_C, SEL_SCIFB1_2), PINMUX_IPSR_DATA(IP1_25_22, AVB_TXD7), - PINMUX_IPSR_MODSEL_DATA(IP1_25_22, TX1_B, SEL_SCIF1_1), - PINMUX_IPSR_MODSEL_DATA(IP1_25_22, VI0_FIELD, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP1_25_22, VI0_FIELD_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP1_25_22, VI2_DATA7_VI2_B7, SEL_VI2_0), + PINMUX_IPSR_MSEL(IP1_25_22, TX1_B, SEL_SCIF1_1), + PINMUX_IPSR_MSEL(IP1_25_22, VI0_FIELD, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP1_25_22, VI0_FIELD_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP1_25_22, VI2_DATA7_VI2_B7, SEL_VI2_0), PINMUX_IPSR_DATA(IP1_27_26, A0), PINMUX_IPSR_DATA(IP1_27_26, PWM3), PINMUX_IPSR_DATA(IP1_29_28, A1), @@ -922,512 +922,512 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_DATA(IP2_2_0, A2), PINMUX_IPSR_DATA(IP2_2_0, PWM5), - PINMUX_IPSR_MODSEL_DATA(IP2_2_0, MSIOF1_SS1_B, SEL_SOF1_1), + PINMUX_IPSR_MSEL(IP2_2_0, MSIOF1_SS1_B, SEL_SOF1_1), PINMUX_IPSR_DATA(IP2_5_3, A3), PINMUX_IPSR_DATA(IP2_5_3, PWM6), - PINMUX_IPSR_MODSEL_DATA(IP2_5_3, MSIOF1_SS2_B, SEL_SOF1_1), + PINMUX_IPSR_MSEL(IP2_5_3, MSIOF1_SS2_B, SEL_SOF1_1), PINMUX_IPSR_DATA(IP2_8_6, A4), - PINMUX_IPSR_MODSEL_DATA(IP2_8_6, MSIOF1_TXD_B, SEL_SOF1_1), + PINMUX_IPSR_MSEL(IP2_8_6, MSIOF1_TXD_B, SEL_SOF1_1), PINMUX_IPSR_DATA(IP2_8_6, TPU0TO0), PINMUX_IPSR_DATA(IP2_11_9, A5), - PINMUX_IPSR_MODSEL_DATA(IP2_11_9, SCIFA1_TXD_B, SEL_SCIFA1_1), + PINMUX_IPSR_MSEL(IP2_11_9, SCIFA1_TXD_B, SEL_SCIFA1_1), PINMUX_IPSR_DATA(IP2_11_9, TPU0TO1), PINMUX_IPSR_DATA(IP2_14_12, A6), - PINMUX_IPSR_MODSEL_DATA(IP2_14_12, SCIFA1_RTS_N_B, SEL_SCIFA1_1), + PINMUX_IPSR_MSEL(IP2_14_12, SCIFA1_RTS_N_B, SEL_SCIFA1_1), PINMUX_IPSR_DATA(IP2_14_12, TPU0TO2), PINMUX_IPSR_DATA(IP2_17_15, A7), - PINMUX_IPSR_MODSEL_DATA(IP2_17_15, SCIFA1_SCK_B, SEL_SCIFA1_1), + PINMUX_IPSR_MSEL(IP2_17_15, SCIFA1_SCK_B, SEL_SCIFA1_1), PINMUX_IPSR_DATA(IP2_17_15, AUDIO_CLKOUT_B), PINMUX_IPSR_DATA(IP2_17_15, TPU0TO3), PINMUX_IPSR_DATA(IP2_21_18, A8), - PINMUX_IPSR_MODSEL_DATA(IP2_21_18, SCIFA1_RXD_B, SEL_SCIFA1_1), - PINMUX_IPSR_MODSEL_DATA(IP2_21_18, SSI_SCK5_B, SEL_SSI5_1), - PINMUX_IPSR_MODSEL_DATA(IP2_21_18, VI0_R4, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP2_21_18, VI0_R4_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP2_21_18, SCIFB2_RXD_C, SEL_SCIFB2_2), - PINMUX_IPSR_MODSEL_DATA(IP2_21_18, RX2_B, SEL_SCIF2_1), - PINMUX_IPSR_MODSEL_DATA(IP2_21_18, VI2_DATA0_VI2_B0_B, SEL_VI2_1), + PINMUX_IPSR_MSEL(IP2_21_18, SCIFA1_RXD_B, SEL_SCIFA1_1), + PINMUX_IPSR_MSEL(IP2_21_18, SSI_SCK5_B, SEL_SSI5_1), + PINMUX_IPSR_MSEL(IP2_21_18, VI0_R4, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP2_21_18, VI0_R4_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP2_21_18, SCIFB2_RXD_C, SEL_SCIFB2_2), + PINMUX_IPSR_MSEL(IP2_21_18, RX2_B, SEL_SCIF2_1), + PINMUX_IPSR_MSEL(IP2_21_18, VI2_DATA0_VI2_B0_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP2_25_22, A9), - PINMUX_IPSR_MODSEL_DATA(IP2_25_22, SCIFA1_CTS_N_B, SEL_SCIFA1_1), - PINMUX_IPSR_MODSEL_DATA(IP2_25_22, SSI_WS5_B, SEL_SSI5_1), - PINMUX_IPSR_MODSEL_DATA(IP2_25_22, VI0_R5, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP2_25_22, VI0_R5_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP2_25_22, SCIFB2_TXD_C, SEL_SCIFB2_2), - PINMUX_IPSR_MODSEL_DATA(IP2_25_22, TX2_B, SEL_SCIF2_1), - PINMUX_IPSR_MODSEL_DATA(IP2_25_22, VI2_DATA1_VI2_B1_B, SEL_VI2_1), + PINMUX_IPSR_MSEL(IP2_25_22, SCIFA1_CTS_N_B, SEL_SCIFA1_1), + PINMUX_IPSR_MSEL(IP2_25_22, SSI_WS5_B, SEL_SSI5_1), + PINMUX_IPSR_MSEL(IP2_25_22, VI0_R5, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP2_25_22, VI0_R5_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP2_25_22, SCIFB2_TXD_C, SEL_SCIFB2_2), + PINMUX_IPSR_MSEL(IP2_25_22, TX2_B, SEL_SCIF2_1), + PINMUX_IPSR_MSEL(IP2_25_22, VI2_DATA1_VI2_B1_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP2_28_26, A10), - PINMUX_IPSR_MODSEL_DATA(IP2_28_26, SSI_SDATA5_B, SEL_SSI5_1), + PINMUX_IPSR_MSEL(IP2_28_26, SSI_SDATA5_B, SEL_SSI5_1), PINMUX_IPSR_DATA(IP2_28_26, MSIOF2_SYNC), - PINMUX_IPSR_MODSEL_DATA(IP2_28_26, VI0_R6, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP2_28_26, VI0_R6_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP2_28_26, VI2_DATA2_VI2_B2_B, SEL_VI2_1), + PINMUX_IPSR_MSEL(IP2_28_26, VI0_R6, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP2_28_26, VI0_R6_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP2_28_26, VI2_DATA2_VI2_B2_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP3_3_0, A11), - PINMUX_IPSR_MODSEL_DATA(IP3_3_0, SCIFB2_CTS_N_B, SEL_SCIFB2_1), + PINMUX_IPSR_MSEL(IP3_3_0, SCIFB2_CTS_N_B, SEL_SCIFB2_1), PINMUX_IPSR_DATA(IP3_3_0, MSIOF2_SCK), - PINMUX_IPSR_MODSEL_DATA(IP3_3_0, VI1_R0, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP3_3_0, VI1_R0_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP3_3_0, VI1_R0, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP3_3_0, VI1_R0_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP3_3_0, VI2_G0), - PINMUX_IPSR_MODSEL_DATA(IP3_3_0, VI2_DATA3_VI2_B3_B, SEL_VI2_1), + PINMUX_IPSR_MSEL(IP3_3_0, VI2_DATA3_VI2_B3_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP3_7_4, A12), - PINMUX_IPSR_MODSEL_DATA(IP3_7_4, SCIFB2_RXD_B, SEL_SCIFB2_1), + PINMUX_IPSR_MSEL(IP3_7_4, SCIFB2_RXD_B, SEL_SCIFB2_1), PINMUX_IPSR_DATA(IP3_7_4, MSIOF2_TXD), - PINMUX_IPSR_MODSEL_DATA(IP3_7_4, VI1_R1, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP3_7_4, VI1_R1_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP3_7_4, VI1_R1, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP3_7_4, VI1_R1_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP3_7_4, VI2_G1), - PINMUX_IPSR_MODSEL_DATA(IP3_7_4, VI2_DATA4_VI2_B4_B, SEL_VI2_1), + PINMUX_IPSR_MSEL(IP3_7_4, VI2_DATA4_VI2_B4_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP3_11_8, A13), - PINMUX_IPSR_MODSEL_DATA(IP3_11_8, SCIFB2_RTS_N_B, SEL_SCIFB2_1), + PINMUX_IPSR_MSEL(IP3_11_8, SCIFB2_RTS_N_B, SEL_SCIFB2_1), PINMUX_IPSR_DATA(IP3_11_8, EX_WAIT2), PINMUX_IPSR_DATA(IP3_11_8, MSIOF2_RXD), - PINMUX_IPSR_MODSEL_DATA(IP3_11_8, VI1_R2, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP3_11_8, VI1_R2_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP3_11_8, VI1_R2, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP3_11_8, VI1_R2_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP3_11_8, VI2_G2), - PINMUX_IPSR_MODSEL_DATA(IP3_11_8, VI2_DATA5_VI2_B5_B, SEL_VI2_1), + PINMUX_IPSR_MSEL(IP3_11_8, VI2_DATA5_VI2_B5_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP3_14_12, A14), - PINMUX_IPSR_MODSEL_DATA(IP3_14_12, SCIFB2_TXD_B, SEL_SCIFB2_1), + PINMUX_IPSR_MSEL(IP3_14_12, SCIFB2_TXD_B, SEL_SCIFB2_1), PINMUX_IPSR_DATA(IP3_14_12, ATACS11_N), PINMUX_IPSR_DATA(IP3_14_12, MSIOF2_SS1), PINMUX_IPSR_DATA(IP3_17_15, A15), - PINMUX_IPSR_MODSEL_DATA(IP3_17_15, SCIFB2_SCK_B, SEL_SCIFB2_1), + PINMUX_IPSR_MSEL(IP3_17_15, SCIFB2_SCK_B, SEL_SCIFB2_1), PINMUX_IPSR_DATA(IP3_17_15, ATARD1_N), PINMUX_IPSR_DATA(IP3_17_15, MSIOF2_SS2), PINMUX_IPSR_DATA(IP3_19_18, A16), PINMUX_IPSR_DATA(IP3_19_18, ATAWR1_N), PINMUX_IPSR_DATA(IP3_22_20, A17), - PINMUX_IPSR_MODSEL_DATA(IP3_22_20, AD_DO_B, SEL_ADI_1), + PINMUX_IPSR_MSEL(IP3_22_20, AD_DO_B, SEL_ADI_1), PINMUX_IPSR_DATA(IP3_22_20, ATADIR1_N), PINMUX_IPSR_DATA(IP3_25_23, A18), - PINMUX_IPSR_MODSEL_DATA(IP3_25_23, AD_CLK_B, SEL_ADI_1), + PINMUX_IPSR_MSEL(IP3_25_23, AD_CLK_B, SEL_ADI_1), PINMUX_IPSR_DATA(IP3_25_23, ATAG1_N), PINMUX_IPSR_DATA(IP3_28_26, A19), - PINMUX_IPSR_MODSEL_DATA(IP3_28_26, AD_NCS_N_B, SEL_ADI_1), + PINMUX_IPSR_MSEL(IP3_28_26, AD_NCS_N_B, SEL_ADI_1), PINMUX_IPSR_DATA(IP3_28_26, ATACS01_N), - PINMUX_IPSR_MODSEL_DATA(IP3_28_26, EX_WAIT0_B, SEL_LBS_1), + PINMUX_IPSR_MSEL(IP3_28_26, EX_WAIT0_B, SEL_LBS_1), PINMUX_IPSR_DATA(IP3_31_29, A20), PINMUX_IPSR_DATA(IP3_31_29, SPCLK), - PINMUX_IPSR_MODSEL_DATA(IP3_31_29, VI1_R3, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP3_31_29, VI1_R3_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP3_31_29, VI1_R3, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP3_31_29, VI1_R3_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP3_31_29, VI2_G4), PINMUX_IPSR_DATA(IP4_2_0, A21), PINMUX_IPSR_DATA(IP4_2_0, MOSI_IO0), - PINMUX_IPSR_MODSEL_DATA(IP4_2_0, VI1_R4, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP4_2_0, VI1_R4_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP4_2_0, VI1_R4, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP4_2_0, VI1_R4_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP4_2_0, VI2_G5), PINMUX_IPSR_DATA(IP4_5_3, A22), PINMUX_IPSR_DATA(IP4_5_3, MISO_IO1), - PINMUX_IPSR_MODSEL_DATA(IP4_5_3, VI1_R5, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP4_5_3, VI1_R5_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP4_5_3, VI1_R5, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP4_5_3, VI1_R5_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP4_5_3, VI2_G6), PINMUX_IPSR_DATA(IP4_8_6, A23), PINMUX_IPSR_DATA(IP4_8_6, IO2), - PINMUX_IPSR_MODSEL_DATA(IP4_8_6, VI1_G7, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP4_8_6, VI1_G7_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP4_8_6, VI1_G7, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP4_8_6, VI1_G7_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP4_8_6, VI2_G7), PINMUX_IPSR_DATA(IP4_11_9, A24), PINMUX_IPSR_DATA(IP4_11_9, IO3), - PINMUX_IPSR_MODSEL_DATA(IP4_11_9, VI1_R7, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP4_11_9, VI1_R7_B, SEL_VI1_1), - PINMUX_IPSR_MODSEL_DATA(IP4_11_9, VI2_CLKENB, SEL_VI2_0), - PINMUX_IPSR_MODSEL_DATA(IP4_11_9, VI2_CLKENB_B, SEL_VI2_1), + PINMUX_IPSR_MSEL(IP4_11_9, VI1_R7, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP4_11_9, VI1_R7_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP4_11_9, VI2_CLKENB, SEL_VI2_0), + PINMUX_IPSR_MSEL(IP4_11_9, VI2_CLKENB_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP4_14_12, A25), PINMUX_IPSR_DATA(IP4_14_12, SSL), - PINMUX_IPSR_MODSEL_DATA(IP4_14_12, VI1_G6, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP4_14_12, VI1_G6_B, SEL_VI1_1), - PINMUX_IPSR_MODSEL_DATA(IP4_14_12, VI2_FIELD, SEL_VI2_0), - PINMUX_IPSR_MODSEL_DATA(IP4_14_12, VI2_FIELD_B, SEL_VI2_1), + PINMUX_IPSR_MSEL(IP4_14_12, VI1_G6, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP4_14_12, VI1_G6_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP4_14_12, VI2_FIELD, SEL_VI2_0), + PINMUX_IPSR_MSEL(IP4_14_12, VI2_FIELD_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP4_17_15, CS0_N), - PINMUX_IPSR_MODSEL_DATA(IP4_17_15, VI1_R6, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP4_17_15, VI1_R6_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP4_17_15, VI1_R6, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP4_17_15, VI1_R6_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP4_17_15, VI2_G3), - PINMUX_IPSR_MODSEL_DATA(IP4_17_15, MSIOF0_SS2_B, SEL_SOF0_1), + PINMUX_IPSR_MSEL(IP4_17_15, MSIOF0_SS2_B, SEL_SOF0_1), PINMUX_IPSR_DATA(IP4_20_18, CS1_N_A26), PINMUX_IPSR_DATA(IP4_20_18, SPEEDIN), - PINMUX_IPSR_MODSEL_DATA(IP4_20_18, VI0_R7, SEL_VI0_0), - PINMUX_IPSR_MODSEL_DATA(IP4_20_18, VI0_R7_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP4_20_18, VI2_CLK, SEL_VI2_0), - PINMUX_IPSR_MODSEL_DATA(IP4_20_18, VI2_CLK_B, SEL_VI2_1), + PINMUX_IPSR_MSEL(IP4_20_18, VI0_R7, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP4_20_18, VI0_R7_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP4_20_18, VI2_CLK, SEL_VI2_0), + PINMUX_IPSR_MSEL(IP4_20_18, VI2_CLK_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP4_23_21, EX_CS0_N), - PINMUX_IPSR_MODSEL_DATA(IP4_23_21, HRX1_B, SEL_HSCIF1_1), - PINMUX_IPSR_MODSEL_DATA(IP4_23_21, VI1_G5, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP4_23_21, VI1_G5_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP4_23_21, HRX1_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP4_23_21, VI1_G5, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP4_23_21, VI1_G5_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP4_23_21, VI2_R0), - PINMUX_IPSR_MODSEL_DATA(IP4_23_21, HTX0_B, SEL_HSCIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP4_23_21, MSIOF0_SS1_B, SEL_SOF0_1), + PINMUX_IPSR_MSEL(IP4_23_21, HTX0_B, SEL_HSCIF0_1), + PINMUX_IPSR_MSEL(IP4_23_21, MSIOF0_SS1_B, SEL_SOF0_1), PINMUX_IPSR_DATA(IP4_26_24, EX_CS1_N), PINMUX_IPSR_DATA(IP4_26_24, GPS_CLK), - PINMUX_IPSR_MODSEL_DATA(IP4_26_24, HCTS1_N_B, SEL_HSCIF1_1), - PINMUX_IPSR_MODSEL_DATA(IP4_26_24, VI1_FIELD, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP4_26_24, VI1_FIELD_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP4_26_24, HCTS1_N_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP4_26_24, VI1_FIELD, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP4_26_24, VI1_FIELD_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP4_26_24, VI2_R1), PINMUX_IPSR_DATA(IP4_29_27, EX_CS2_N), PINMUX_IPSR_DATA(IP4_29_27, GPS_SIGN), - PINMUX_IPSR_MODSEL_DATA(IP4_29_27, HRTS1_N_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP4_29_27, HRTS1_N_B, SEL_HSCIF1_1), PINMUX_IPSR_DATA(IP4_29_27, VI3_CLKENB), - PINMUX_IPSR_MODSEL_DATA(IP4_29_27, VI1_G0, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP4_29_27, VI1_G0_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP4_29_27, VI1_G0, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP4_29_27, VI1_G0_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP4_29_27, VI2_R2), PINMUX_IPSR_DATA(IP5_2_0, EX_CS3_N), PINMUX_IPSR_DATA(IP5_2_0, GPS_MAG), PINMUX_IPSR_DATA(IP5_2_0, VI3_FIELD), - PINMUX_IPSR_MODSEL_DATA(IP5_2_0, VI1_G1, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP5_2_0, VI1_G1_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP5_2_0, VI1_G1, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP5_2_0, VI1_G1_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP5_2_0, VI2_R3), PINMUX_IPSR_DATA(IP5_5_3, EX_CS4_N), - PINMUX_IPSR_MODSEL_DATA(IP5_5_3, MSIOF1_SCK_B, SEL_SOF1_1), + PINMUX_IPSR_MSEL(IP5_5_3, MSIOF1_SCK_B, SEL_SOF1_1), PINMUX_IPSR_DATA(IP5_5_3, VI3_HSYNC_N), - PINMUX_IPSR_MODSEL_DATA(IP5_5_3, VI2_HSYNC_N, SEL_VI2_0), - PINMUX_IPSR_MODSEL_DATA(IP5_5_3, IIC1_SCL, SEL_IIC1_0), - PINMUX_IPSR_MODSEL_DATA(IP5_5_3, VI2_HSYNC_N_B, SEL_VI2_1), + PINMUX_IPSR_MSEL(IP5_5_3, VI2_HSYNC_N, SEL_VI2_0), + PINMUX_IPSR_MSEL(IP5_5_3, IIC1_SCL, SEL_IIC1_0), + PINMUX_IPSR_MSEL(IP5_5_3, VI2_HSYNC_N_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP5_5_3, INTC_EN0_N), - PINMUX_IPSR_MODSEL_DATA(IP5_5_3, I2C1_SCL, SEL_I2C1_0), + PINMUX_IPSR_MSEL(IP5_5_3, I2C1_SCL, SEL_I2C1_0), PINMUX_IPSR_DATA(IP5_9_6, EX_CS5_N), - PINMUX_IPSR_MODSEL_DATA(IP5_9_6, CAN0_RX, SEL_CAN0_0), - PINMUX_IPSR_MODSEL_DATA(IP5_9_6, MSIOF1_RXD_B, SEL_SOF1_1), + PINMUX_IPSR_MSEL(IP5_9_6, CAN0_RX, SEL_CAN0_0), + PINMUX_IPSR_MSEL(IP5_9_6, MSIOF1_RXD_B, SEL_SOF1_1), PINMUX_IPSR_DATA(IP5_9_6, VI3_VSYNC_N), - PINMUX_IPSR_MODSEL_DATA(IP5_9_6, VI1_G2, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP5_9_6, VI1_G2_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP5_9_6, VI1_G2, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP5_9_6, VI1_G2_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP5_9_6, VI2_R4), - PINMUX_IPSR_MODSEL_DATA(IP5_9_6, IIC1_SDA, SEL_IIC1_0), + PINMUX_IPSR_MSEL(IP5_9_6, IIC1_SDA, SEL_IIC1_0), PINMUX_IPSR_DATA(IP5_9_6, INTC_EN1_N), - PINMUX_IPSR_MODSEL_DATA(IP5_9_6, I2C1_SDA, SEL_I2C1_0), + PINMUX_IPSR_MSEL(IP5_9_6, I2C1_SDA, SEL_I2C1_0), PINMUX_IPSR_DATA(IP5_12_10, BS_N), - PINMUX_IPSR_MODSEL_DATA(IP5_12_10, IETX, SEL_IEB_0), - PINMUX_IPSR_MODSEL_DATA(IP5_12_10, HTX1_B, SEL_HSCIF1_1), - PINMUX_IPSR_MODSEL_DATA(IP5_12_10, CAN1_TX, SEL_CAN1_0), + PINMUX_IPSR_MSEL(IP5_12_10, IETX, SEL_IEB_0), + PINMUX_IPSR_MSEL(IP5_12_10, HTX1_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP5_12_10, CAN1_TX, SEL_CAN1_0), PINMUX_IPSR_DATA(IP5_12_10, DRACK0), - PINMUX_IPSR_MODSEL_DATA(IP5_12_10, IETX_C, SEL_IEB_2), + PINMUX_IPSR_MSEL(IP5_12_10, IETX_C, SEL_IEB_2), PINMUX_IPSR_DATA(IP5_14_13, RD_N), - PINMUX_IPSR_MODSEL_DATA(IP5_14_13, CAN0_TX, SEL_CAN0_0), - PINMUX_IPSR_MODSEL_DATA(IP5_14_13, SCIFA0_SCK_B, SEL_SCFA_1), + PINMUX_IPSR_MSEL(IP5_14_13, CAN0_TX, SEL_CAN0_0), + PINMUX_IPSR_MSEL(IP5_14_13, SCIFA0_SCK_B, SEL_SCFA_1), PINMUX_IPSR_DATA(IP5_17_15, RD_WR_N), - PINMUX_IPSR_MODSEL_DATA(IP5_17_15, VI1_G3, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP5_17_15, VI1_G3_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP5_17_15, VI1_G3, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP5_17_15, VI1_G3_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP5_17_15, VI2_R5), - PINMUX_IPSR_MODSEL_DATA(IP5_17_15, SCIFA0_RXD_B, SEL_SCFA_1), + PINMUX_IPSR_MSEL(IP5_17_15, SCIFA0_RXD_B, SEL_SCFA_1), PINMUX_IPSR_DATA(IP5_17_15, INTC_IRQ4_N), PINMUX_IPSR_DATA(IP5_20_18, WE0_N), - PINMUX_IPSR_MODSEL_DATA(IP5_20_18, IECLK, SEL_IEB_0), - PINMUX_IPSR_MODSEL_DATA(IP5_20_18, CAN_CLK, SEL_CANCLK_0), - PINMUX_IPSR_MODSEL_DATA(IP5_20_18, VI2_VSYNC_N, SEL_VI2_0), - PINMUX_IPSR_MODSEL_DATA(IP5_20_18, SCIFA0_TXD_B, SEL_SCFA_1), - PINMUX_IPSR_MODSEL_DATA(IP5_20_18, VI2_VSYNC_N_B, SEL_VI2_1), + PINMUX_IPSR_MSEL(IP5_20_18, IECLK, SEL_IEB_0), + PINMUX_IPSR_MSEL(IP5_20_18, CAN_CLK, SEL_CANCLK_0), + PINMUX_IPSR_MSEL(IP5_20_18, VI2_VSYNC_N, SEL_VI2_0), + PINMUX_IPSR_MSEL(IP5_20_18, SCIFA0_TXD_B, SEL_SCFA_1), + PINMUX_IPSR_MSEL(IP5_20_18, VI2_VSYNC_N_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP5_23_21, WE1_N), - PINMUX_IPSR_MODSEL_DATA(IP5_23_21, IERX, SEL_IEB_0), - PINMUX_IPSR_MODSEL_DATA(IP5_23_21, CAN1_RX, SEL_CAN1_0), - PINMUX_IPSR_MODSEL_DATA(IP5_23_21, VI1_G4, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP5_23_21, VI1_G4_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP5_23_21, IERX, SEL_IEB_0), + PINMUX_IPSR_MSEL(IP5_23_21, CAN1_RX, SEL_CAN1_0), + PINMUX_IPSR_MSEL(IP5_23_21, VI1_G4, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP5_23_21, VI1_G4_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP5_23_21, VI2_R6), - PINMUX_IPSR_MODSEL_DATA(IP5_23_21, SCIFA0_CTS_N_B, SEL_SCFA_1), - PINMUX_IPSR_MODSEL_DATA(IP5_23_21, IERX_C, SEL_IEB_2), - PINMUX_IPSR_MODSEL_DATA(IP5_26_24, EX_WAIT0, SEL_LBS_0), + PINMUX_IPSR_MSEL(IP5_23_21, SCIFA0_CTS_N_B, SEL_SCFA_1), + PINMUX_IPSR_MSEL(IP5_23_21, IERX_C, SEL_IEB_2), + PINMUX_IPSR_MSEL(IP5_26_24, EX_WAIT0, SEL_LBS_0), PINMUX_IPSR_DATA(IP5_26_24, IRQ3), PINMUX_IPSR_DATA(IP5_26_24, INTC_IRQ3_N), - PINMUX_IPSR_MODSEL_DATA(IP5_26_24, VI3_CLK, SEL_VI3_0), - PINMUX_IPSR_MODSEL_DATA(IP5_26_24, SCIFA0_RTS_N_B, SEL_SCFA_1), - PINMUX_IPSR_MODSEL_DATA(IP5_26_24, HRX0_B, SEL_HSCIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP5_26_24, MSIOF0_SCK_B, SEL_SOF0_1), + PINMUX_IPSR_MSEL(IP5_26_24, VI3_CLK, SEL_VI3_0), + PINMUX_IPSR_MSEL(IP5_26_24, SCIFA0_RTS_N_B, SEL_SCFA_1), + PINMUX_IPSR_MSEL(IP5_26_24, HRX0_B, SEL_HSCIF0_1), + PINMUX_IPSR_MSEL(IP5_26_24, MSIOF0_SCK_B, SEL_SOF0_1), PINMUX_IPSR_DATA(IP5_29_27, DREQ0_N), - PINMUX_IPSR_MODSEL_DATA(IP5_29_27, VI1_HSYNC_N, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP5_29_27, VI1_HSYNC_N_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP5_29_27, VI1_HSYNC_N, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP5_29_27, VI1_HSYNC_N_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP5_29_27, VI2_R7), - PINMUX_IPSR_MODSEL_DATA(IP5_29_27, SSI_SCK78_C, SEL_SSI7_2), - PINMUX_IPSR_MODSEL_DATA(IP5_29_27, SSI_WS78_B, SEL_SSI7_1), + PINMUX_IPSR_MSEL(IP5_29_27, SSI_SCK78_C, SEL_SSI7_2), + PINMUX_IPSR_MSEL(IP5_29_27, SSI_WS78_B, SEL_SSI7_1), PINMUX_IPSR_DATA(IP6_2_0, DACK0), PINMUX_IPSR_DATA(IP6_2_0, IRQ0), PINMUX_IPSR_DATA(IP6_2_0, INTC_IRQ0_N), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SSI_SCK6_B, SEL_SSI6_1), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, VI1_VSYNC_N, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, VI1_VSYNC_N_B, SEL_VI1_1), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SSI_WS78_C, SEL_SSI7_2), + PINMUX_IPSR_MSEL(IP6_2_0, SSI_SCK6_B, SEL_SSI6_1), + PINMUX_IPSR_MSEL(IP6_2_0, VI1_VSYNC_N, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP6_2_0, VI1_VSYNC_N_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP6_2_0, SSI_WS78_C, SEL_SSI7_2), PINMUX_IPSR_DATA(IP6_5_3, DREQ1_N), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, VI1_CLKENB, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, VI1_CLKENB_B, SEL_VI1_1), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SSI_SDATA7_C, SEL_SSI7_2), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SSI_SCK78_B, SEL_SSI7_1), + PINMUX_IPSR_MSEL(IP6_5_3, VI1_CLKENB, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP6_5_3, VI1_CLKENB_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP6_5_3, SSI_SDATA7_C, SEL_SSI7_2), + PINMUX_IPSR_MSEL(IP6_5_3, SSI_SCK78_B, SEL_SSI7_1), PINMUX_IPSR_DATA(IP6_8_6, DACK1), PINMUX_IPSR_DATA(IP6_8_6, IRQ1), PINMUX_IPSR_DATA(IP6_8_6, INTC_IRQ1_N), - PINMUX_IPSR_MODSEL_DATA(IP6_8_6, SSI_WS6_B, SEL_SSI6_1), - PINMUX_IPSR_MODSEL_DATA(IP6_8_6, SSI_SDATA8_C, SEL_SSI8_2), + PINMUX_IPSR_MSEL(IP6_8_6, SSI_WS6_B, SEL_SSI6_1), + PINMUX_IPSR_MSEL(IP6_8_6, SSI_SDATA8_C, SEL_SSI8_2), PINMUX_IPSR_DATA(IP6_10_9, DREQ2_N), - PINMUX_IPSR_MODSEL_DATA(IP6_10_9, HSCK1_B, SEL_HSCIF1_1), - PINMUX_IPSR_MODSEL_DATA(IP6_10_9, HCTS0_N_B, SEL_HSCIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP6_10_9, MSIOF0_TXD_B, SEL_SOF0_1), + PINMUX_IPSR_MSEL(IP6_10_9, HSCK1_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP6_10_9, HCTS0_N_B, SEL_HSCIF0_1), + PINMUX_IPSR_MSEL(IP6_10_9, MSIOF0_TXD_B, SEL_SOF0_1), PINMUX_IPSR_DATA(IP6_13_11, DACK2), PINMUX_IPSR_DATA(IP6_13_11, IRQ2), PINMUX_IPSR_DATA(IP6_13_11, INTC_IRQ2_N), - PINMUX_IPSR_MODSEL_DATA(IP6_13_11, SSI_SDATA6_B, SEL_SSI6_1), - PINMUX_IPSR_MODSEL_DATA(IP6_13_11, HRTS0_N_B, SEL_HSCIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP6_13_11, MSIOF0_RXD_B, SEL_SOF0_1), + PINMUX_IPSR_MSEL(IP6_13_11, SSI_SDATA6_B, SEL_SSI6_1), + PINMUX_IPSR_MSEL(IP6_13_11, HRTS0_N_B, SEL_HSCIF0_1), + PINMUX_IPSR_MSEL(IP6_13_11, MSIOF0_RXD_B, SEL_SOF0_1), PINMUX_IPSR_DATA(IP6_16_14, ETH_CRS_DV), - PINMUX_IPSR_MODSEL_DATA(IP6_16_14, STP_ISCLK_0_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP6_16_14, TS_SDEN0_D, SEL_TSIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP6_16_14, GLO_Q0_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP6_16_14, IIC2_SCL_E, SEL_IIC2_4), - PINMUX_IPSR_MODSEL_DATA(IP6_16_14, I2C2_SCL_E, SEL_I2C2_4), + PINMUX_IPSR_MSEL(IP6_16_14, STP_ISCLK_0_B, SEL_SSP_1), + PINMUX_IPSR_MSEL(IP6_16_14, TS_SDEN0_D, SEL_TSIF0_3), + PINMUX_IPSR_MSEL(IP6_16_14, GLO_Q0_C, SEL_GPS_2), + PINMUX_IPSR_MSEL(IP6_16_14, IIC2_SCL_E, SEL_IIC2_4), + PINMUX_IPSR_MSEL(IP6_16_14, I2C2_SCL_E, SEL_I2C2_4), PINMUX_IPSR_DATA(IP6_19_17, ETH_RX_ER), - PINMUX_IPSR_MODSEL_DATA(IP6_19_17, STP_ISD_0_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP6_19_17, TS_SPSYNC0_D, SEL_TSIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP6_19_17, GLO_Q1_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP6_19_17, IIC2_SDA_E, SEL_IIC2_4), - PINMUX_IPSR_MODSEL_DATA(IP6_19_17, I2C2_SDA_E, SEL_I2C2_4), + PINMUX_IPSR_MSEL(IP6_19_17, STP_ISD_0_B, SEL_SSP_1), + PINMUX_IPSR_MSEL(IP6_19_17, TS_SPSYNC0_D, SEL_TSIF0_3), + PINMUX_IPSR_MSEL(IP6_19_17, GLO_Q1_C, SEL_GPS_2), + PINMUX_IPSR_MSEL(IP6_19_17, IIC2_SDA_E, SEL_IIC2_4), + PINMUX_IPSR_MSEL(IP6_19_17, I2C2_SDA_E, SEL_I2C2_4), PINMUX_IPSR_DATA(IP6_22_20, ETH_RXD0), - PINMUX_IPSR_MODSEL_DATA(IP6_22_20, STP_ISEN_0_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP6_22_20, TS_SDAT0_D, SEL_TSIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP6_22_20, GLO_I0_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCIFB1_SCK_G, SEL_SCIFB1_6), - PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCK1_E, SEL_SCIF1_4), + PINMUX_IPSR_MSEL(IP6_22_20, STP_ISEN_0_B, SEL_SSP_1), + PINMUX_IPSR_MSEL(IP6_22_20, TS_SDAT0_D, SEL_TSIF0_3), + PINMUX_IPSR_MSEL(IP6_22_20, GLO_I0_C, SEL_GPS_2), + PINMUX_IPSR_MSEL(IP6_22_20, SCIFB1_SCK_G, SEL_SCIFB1_6), + PINMUX_IPSR_MSEL(IP6_22_20, SCK1_E, SEL_SCIF1_4), PINMUX_IPSR_DATA(IP6_25_23, ETH_RXD1), - PINMUX_IPSR_MODSEL_DATA(IP6_25_23, HRX0_E, SEL_HSCIF0_4), - PINMUX_IPSR_MODSEL_DATA(IP6_25_23, STP_ISSYNC_0_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP6_25_23, TS_SCK0_D, SEL_TSIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP6_25_23, GLO_I1_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP6_25_23, SCIFB1_RXD_G, SEL_SCIFB1_6), - PINMUX_IPSR_MODSEL_DATA(IP6_25_23, RX1_E, SEL_SCIF1_4), + PINMUX_IPSR_MSEL(IP6_25_23, HRX0_E, SEL_HSCIF0_4), + PINMUX_IPSR_MSEL(IP6_25_23, STP_ISSYNC_0_B, SEL_SSP_1), + PINMUX_IPSR_MSEL(IP6_25_23, TS_SCK0_D, SEL_TSIF0_3), + PINMUX_IPSR_MSEL(IP6_25_23, GLO_I1_C, SEL_GPS_2), + PINMUX_IPSR_MSEL(IP6_25_23, SCIFB1_RXD_G, SEL_SCIFB1_6), + PINMUX_IPSR_MSEL(IP6_25_23, RX1_E, SEL_SCIF1_4), PINMUX_IPSR_DATA(IP6_28_26, ETH_LINK), - PINMUX_IPSR_MODSEL_DATA(IP6_28_26, HTX0_E, SEL_HSCIF0_4), - PINMUX_IPSR_MODSEL_DATA(IP6_28_26, STP_IVCXO27_0_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP6_28_26, SCIFB1_TXD_G, SEL_SCIFB1_6), - PINMUX_IPSR_MODSEL_DATA(IP6_28_26, TX1_E, SEL_SCIF1_4), + PINMUX_IPSR_MSEL(IP6_28_26, HTX0_E, SEL_HSCIF0_4), + PINMUX_IPSR_MSEL(IP6_28_26, STP_IVCXO27_0_B, SEL_SSP_1), + PINMUX_IPSR_MSEL(IP6_28_26, SCIFB1_TXD_G, SEL_SCIFB1_6), + PINMUX_IPSR_MSEL(IP6_28_26, TX1_E, SEL_SCIF1_4), PINMUX_IPSR_DATA(IP6_31_29, ETH_REF_CLK), - PINMUX_IPSR_MODSEL_DATA(IP6_31_29, HCTS0_N_E, SEL_HSCIF0_4), - PINMUX_IPSR_MODSEL_DATA(IP6_31_29, STP_IVCXO27_1_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP6_31_29, HRX0_F, SEL_HSCIF0_5), + PINMUX_IPSR_MSEL(IP6_31_29, HCTS0_N_E, SEL_HSCIF0_4), + PINMUX_IPSR_MSEL(IP6_31_29, STP_IVCXO27_1_B, SEL_SSP_1), + PINMUX_IPSR_MSEL(IP6_31_29, HRX0_F, SEL_HSCIF0_5), PINMUX_IPSR_DATA(IP7_2_0, ETH_MDIO), - PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HRTS0_N_E, SEL_HSCIF0_4), - PINMUX_IPSR_MODSEL_DATA(IP7_2_0, SIM0_D_C, SEL_SIM_2), - PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HCTS0_N_F, SEL_HSCIF0_5), + PINMUX_IPSR_MSEL(IP7_2_0, HRTS0_N_E, SEL_HSCIF0_4), + PINMUX_IPSR_MSEL(IP7_2_0, SIM0_D_C, SEL_SIM_2), + PINMUX_IPSR_MSEL(IP7_2_0, HCTS0_N_F, SEL_HSCIF0_5), PINMUX_IPSR_DATA(IP7_5_3, ETH_TXD1), - PINMUX_IPSR_MODSEL_DATA(IP7_5_3, HTX0_F, SEL_HSCIF0_5), - PINMUX_IPSR_MODSEL_DATA(IP7_5_3, BPFCLK_G, SEL_FM_6), + PINMUX_IPSR_MSEL(IP7_5_3, HTX0_F, SEL_HSCIF0_5), + PINMUX_IPSR_MSEL(IP7_5_3, BPFCLK_G, SEL_FM_6), PINMUX_IPSR_DATA(IP7_7_6, ETH_TX_EN), - PINMUX_IPSR_MODSEL_DATA(IP7_7_6, SIM0_CLK_C, SEL_SIM_2), - PINMUX_IPSR_MODSEL_DATA(IP7_7_6, HRTS0_N_F, SEL_HSCIF0_5), + PINMUX_IPSR_MSEL(IP7_7_6, SIM0_CLK_C, SEL_SIM_2), + PINMUX_IPSR_MSEL(IP7_7_6, HRTS0_N_F, SEL_HSCIF0_5), PINMUX_IPSR_DATA(IP7_9_8, ETH_MAGIC), - PINMUX_IPSR_MODSEL_DATA(IP7_9_8, SIM0_RST_C, SEL_SIM_2), + PINMUX_IPSR_MSEL(IP7_9_8, SIM0_RST_C, SEL_SIM_2), PINMUX_IPSR_DATA(IP7_12_10, ETH_TXD0), - PINMUX_IPSR_MODSEL_DATA(IP7_12_10, STP_ISCLK_1_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP7_12_10, TS_SDEN1_C, SEL_TSIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP7_12_10, GLO_SCLK_C, SEL_GPS_2), + PINMUX_IPSR_MSEL(IP7_12_10, STP_ISCLK_1_B, SEL_SSP_1), + PINMUX_IPSR_MSEL(IP7_12_10, TS_SDEN1_C, SEL_TSIF1_2), + PINMUX_IPSR_MSEL(IP7_12_10, GLO_SCLK_C, SEL_GPS_2), PINMUX_IPSR_DATA(IP7_15_13, ETH_MDC), - PINMUX_IPSR_MODSEL_DATA(IP7_15_13, STP_ISD_1_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP7_15_13, TS_SPSYNC1_C, SEL_TSIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP7_15_13, GLO_SDATA_C, SEL_GPS_2), + PINMUX_IPSR_MSEL(IP7_15_13, STP_ISD_1_B, SEL_SSP_1), + PINMUX_IPSR_MSEL(IP7_15_13, TS_SPSYNC1_C, SEL_TSIF1_2), + PINMUX_IPSR_MSEL(IP7_15_13, GLO_SDATA_C, SEL_GPS_2), PINMUX_IPSR_DATA(IP7_18_16, PWM0), - PINMUX_IPSR_MODSEL_DATA(IP7_18_16, SCIFA2_SCK_C, SEL_SCIFA2_2), - PINMUX_IPSR_MODSEL_DATA(IP7_18_16, STP_ISEN_1_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP7_18_16, TS_SDAT1_C, SEL_TSIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP7_18_16, GLO_SS_C, SEL_GPS_2), + PINMUX_IPSR_MSEL(IP7_18_16, SCIFA2_SCK_C, SEL_SCIFA2_2), + PINMUX_IPSR_MSEL(IP7_18_16, STP_ISEN_1_B, SEL_SSP_1), + PINMUX_IPSR_MSEL(IP7_18_16, TS_SDAT1_C, SEL_TSIF1_2), + PINMUX_IPSR_MSEL(IP7_18_16, GLO_SS_C, SEL_GPS_2), PINMUX_IPSR_DATA(IP7_21_19, PWM1), - PINMUX_IPSR_MODSEL_DATA(IP7_21_19, SCIFA2_TXD_C, SEL_SCIFA2_2), - PINMUX_IPSR_MODSEL_DATA(IP7_21_19, STP_ISSYNC_1_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP7_21_19, TS_SCK1_C, SEL_TSIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP7_21_19, GLO_RFON_C, SEL_GPS_2), + PINMUX_IPSR_MSEL(IP7_21_19, SCIFA2_TXD_C, SEL_SCIFA2_2), + PINMUX_IPSR_MSEL(IP7_21_19, STP_ISSYNC_1_B, SEL_SSP_1), + PINMUX_IPSR_MSEL(IP7_21_19, TS_SCK1_C, SEL_TSIF1_2), + PINMUX_IPSR_MSEL(IP7_21_19, GLO_RFON_C, SEL_GPS_2), PINMUX_IPSR_DATA(IP7_21_19, PCMOE_N), PINMUX_IPSR_DATA(IP7_24_22, PWM2), PINMUX_IPSR_DATA(IP7_24_22, PWMFSW0), - PINMUX_IPSR_MODSEL_DATA(IP7_24_22, SCIFA2_RXD_C, SEL_SCIFA2_2), + PINMUX_IPSR_MSEL(IP7_24_22, SCIFA2_RXD_C, SEL_SCIFA2_2), PINMUX_IPSR_DATA(IP7_24_22, PCMWE_N), - PINMUX_IPSR_MODSEL_DATA(IP7_24_22, IECLK_C, SEL_IEB_2), + PINMUX_IPSR_MSEL(IP7_24_22, IECLK_C, SEL_IEB_2), PINMUX_IPSR_DATA(IP7_26_25, DU_DOTCLKIN1), PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKC), PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKOUT_C), - PINMUX_IPSR_MODSEL_DATA(IP7_28_27, VI0_CLK, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP7_28_27, VI0_CLK, SEL_VI0_0), PINMUX_IPSR_DATA(IP7_28_27, ATACS00_N), PINMUX_IPSR_DATA(IP7_28_27, AVB_RXD1), - PINMUX_IPSR_MODSEL_DATA(IP7_30_29, VI0_DATA0_VI0_B0, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP7_30_29, VI0_DATA0_VI0_B0, SEL_VI0_0), PINMUX_IPSR_DATA(IP7_30_29, ATACS10_N), PINMUX_IPSR_DATA(IP7_30_29, AVB_RXD2), - PINMUX_IPSR_MODSEL_DATA(IP8_1_0, VI0_DATA1_VI0_B1, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP8_1_0, VI0_DATA1_VI0_B1, SEL_VI0_0), PINMUX_IPSR_DATA(IP8_1_0, ATARD0_N), PINMUX_IPSR_DATA(IP8_1_0, AVB_RXD3), - PINMUX_IPSR_MODSEL_DATA(IP8_3_2, VI0_DATA2_VI0_B2, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP8_3_2, VI0_DATA2_VI0_B2, SEL_VI0_0), PINMUX_IPSR_DATA(IP8_3_2, ATAWR0_N), PINMUX_IPSR_DATA(IP8_3_2, AVB_RXD4), - PINMUX_IPSR_MODSEL_DATA(IP8_5_4, VI0_DATA3_VI0_B3, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP8_5_4, VI0_DATA3_VI0_B3, SEL_VI0_0), PINMUX_IPSR_DATA(IP8_5_4, ATADIR0_N), PINMUX_IPSR_DATA(IP8_5_4, AVB_RXD5), - PINMUX_IPSR_MODSEL_DATA(IP8_7_6, VI0_DATA4_VI0_B4, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP8_7_6, VI0_DATA4_VI0_B4, SEL_VI0_0), PINMUX_IPSR_DATA(IP8_7_6, ATAG0_N), PINMUX_IPSR_DATA(IP8_7_6, AVB_RXD6), - PINMUX_IPSR_MODSEL_DATA(IP8_9_8, VI0_DATA5_VI0_B5, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP8_9_8, VI0_DATA5_VI0_B5, SEL_VI0_0), PINMUX_IPSR_DATA(IP8_9_8, EX_WAIT1), PINMUX_IPSR_DATA(IP8_9_8, AVB_RXD7), - PINMUX_IPSR_MODSEL_DATA(IP8_11_10, VI0_DATA6_VI0_B6, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP8_11_10, VI0_DATA6_VI0_B6, SEL_VI0_0), PINMUX_IPSR_DATA(IP8_11_10, AVB_RX_ER), - PINMUX_IPSR_MODSEL_DATA(IP8_13_12, VI0_DATA7_VI0_B7, SEL_VI0_0), + PINMUX_IPSR_MSEL(IP8_13_12, VI0_DATA7_VI0_B7, SEL_VI0_0), PINMUX_IPSR_DATA(IP8_13_12, AVB_RX_CLK), - PINMUX_IPSR_MODSEL_DATA(IP8_15_14, VI1_CLK, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP8_15_14, VI1_CLK, SEL_VI1_0), PINMUX_IPSR_DATA(IP8_15_14, AVB_RX_DV), - PINMUX_IPSR_MODSEL_DATA(IP8_17_16, VI1_DATA0_VI1_B0, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP8_17_16, SCIFA1_SCK_D, SEL_SCIFA1_3), + PINMUX_IPSR_MSEL(IP8_17_16, VI1_DATA0_VI1_B0, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP8_17_16, SCIFA1_SCK_D, SEL_SCIFA1_3), PINMUX_IPSR_DATA(IP8_17_16, AVB_CRS), - PINMUX_IPSR_MODSEL_DATA(IP8_19_18, VI1_DATA1_VI1_B1, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP8_19_18, SCIFA1_RXD_D, SEL_SCIFA1_3), + PINMUX_IPSR_MSEL(IP8_19_18, VI1_DATA1_VI1_B1, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP8_19_18, SCIFA1_RXD_D, SEL_SCIFA1_3), PINMUX_IPSR_DATA(IP8_19_18, AVB_MDC), - PINMUX_IPSR_MODSEL_DATA(IP8_21_20, VI1_DATA2_VI1_B2, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP8_21_20, SCIFA1_TXD_D, SEL_SCIFA1_3), + PINMUX_IPSR_MSEL(IP8_21_20, VI1_DATA2_VI1_B2, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP8_21_20, SCIFA1_TXD_D, SEL_SCIFA1_3), PINMUX_IPSR_DATA(IP8_21_20, AVB_MDIO), - PINMUX_IPSR_MODSEL_DATA(IP8_23_22, VI1_DATA3_VI1_B3, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP8_23_22, SCIFA1_CTS_N_D, SEL_SCIFA1_3), + PINMUX_IPSR_MSEL(IP8_23_22, VI1_DATA3_VI1_B3, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP8_23_22, SCIFA1_CTS_N_D, SEL_SCIFA1_3), PINMUX_IPSR_DATA(IP8_23_22, AVB_GTX_CLK), - PINMUX_IPSR_MODSEL_DATA(IP8_25_24, VI1_DATA4_VI1_B4, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP8_25_24, SCIFA1_RTS_N_D, SEL_SCIFA1_3), + PINMUX_IPSR_MSEL(IP8_25_24, VI1_DATA4_VI1_B4, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP8_25_24, SCIFA1_RTS_N_D, SEL_SCIFA1_3), PINMUX_IPSR_DATA(IP8_25_24, AVB_MAGIC), - PINMUX_IPSR_MODSEL_DATA(IP8_26, VI1_DATA5_VI1_B5, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP8_26, VI1_DATA5_VI1_B5, SEL_VI1_0), PINMUX_IPSR_DATA(IP8_26, AVB_PHY_INT), - PINMUX_IPSR_MODSEL_DATA(IP8_27, VI1_DATA6_VI1_B6, SEL_VI1_0), + PINMUX_IPSR_MSEL(IP8_27, VI1_DATA6_VI1_B6, SEL_VI1_0), PINMUX_IPSR_DATA(IP8_27, AVB_GTXREFCLK), PINMUX_IPSR_DATA(IP8_28, SD0_CLK), - PINMUX_IPSR_MODSEL_DATA(IP8_28, VI1_DATA0_VI1_B0_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP8_28, VI1_DATA0_VI1_B0_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP8_30_29, SD0_CMD), - PINMUX_IPSR_MODSEL_DATA(IP8_30_29, SCIFB1_SCK_B, SEL_SCIFB1_1), - PINMUX_IPSR_MODSEL_DATA(IP8_30_29, VI1_DATA1_VI1_B1_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP8_30_29, SCIFB1_SCK_B, SEL_SCIFB1_1), + PINMUX_IPSR_MSEL(IP8_30_29, VI1_DATA1_VI1_B1_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP9_1_0, SD0_DAT0), - PINMUX_IPSR_MODSEL_DATA(IP9_1_0, SCIFB1_RXD_B, SEL_SCIFB1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_1_0, VI1_DATA2_VI1_B2_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP9_1_0, SCIFB1_RXD_B, SEL_SCIFB1_1), + PINMUX_IPSR_MSEL(IP9_1_0, VI1_DATA2_VI1_B2_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP9_3_2, SD0_DAT1), - PINMUX_IPSR_MODSEL_DATA(IP9_3_2, SCIFB1_TXD_B, SEL_SCIFB1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_3_2, VI1_DATA3_VI1_B3_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP9_3_2, SCIFB1_TXD_B, SEL_SCIFB1_1), + PINMUX_IPSR_MSEL(IP9_3_2, VI1_DATA3_VI1_B3_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP9_5_4, SD0_DAT2), - PINMUX_IPSR_MODSEL_DATA(IP9_5_4, SCIFB1_CTS_N_B, SEL_SCIFB1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_5_4, VI1_DATA4_VI1_B4_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP9_5_4, SCIFB1_CTS_N_B, SEL_SCIFB1_1), + PINMUX_IPSR_MSEL(IP9_5_4, VI1_DATA4_VI1_B4_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP9_7_6, SD0_DAT3), - PINMUX_IPSR_MODSEL_DATA(IP9_7_6, SCIFB1_RTS_N_B, SEL_SCIFB1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_7_6, VI1_DATA5_VI1_B5_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP9_7_6, SCIFB1_RTS_N_B, SEL_SCIFB1_1), + PINMUX_IPSR_MSEL(IP9_7_6, VI1_DATA5_VI1_B5_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP9_11_8, SD0_CD), PINMUX_IPSR_DATA(IP9_11_8, MMC0_D6), - PINMUX_IPSR_MODSEL_DATA(IP9_11_8, TS_SDEN0_B, SEL_TSIF0_1), + PINMUX_IPSR_MSEL(IP9_11_8, TS_SDEN0_B, SEL_TSIF0_1), PINMUX_IPSR_DATA(IP9_11_8, USB0_EXTP), - PINMUX_IPSR_MODSEL_DATA(IP9_11_8, GLO_SCLK, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP9_11_8, VI1_DATA6_VI1_B6_B, SEL_VI1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_11_8, IIC1_SCL_B, SEL_IIC1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_11_8, I2C1_SCL_B, SEL_I2C1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_11_8, VI2_DATA6_VI2_B6_B, SEL_VI2_1), + PINMUX_IPSR_MSEL(IP9_11_8, GLO_SCLK, SEL_GPS_0), + PINMUX_IPSR_MSEL(IP9_11_8, VI1_DATA6_VI1_B6_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP9_11_8, IIC1_SCL_B, SEL_IIC1_1), + PINMUX_IPSR_MSEL(IP9_11_8, I2C1_SCL_B, SEL_I2C1_1), + PINMUX_IPSR_MSEL(IP9_11_8, VI2_DATA6_VI2_B6_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP9_15_12, SD0_WP), PINMUX_IPSR_DATA(IP9_15_12, MMC0_D7), - PINMUX_IPSR_MODSEL_DATA(IP9_15_12, TS_SPSYNC0_B, SEL_TSIF0_1), + PINMUX_IPSR_MSEL(IP9_15_12, TS_SPSYNC0_B, SEL_TSIF0_1), PINMUX_IPSR_DATA(IP9_15_12, USB0_IDIN), - PINMUX_IPSR_MODSEL_DATA(IP9_15_12, GLO_SDATA, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP9_15_12, VI1_DATA7_VI1_B7_B, SEL_VI1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_15_12, IIC1_SDA_B, SEL_IIC1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_15_12, I2C1_SDA_B, SEL_I2C1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_15_12, VI2_DATA7_VI2_B7_B, SEL_VI2_1), + PINMUX_IPSR_MSEL(IP9_15_12, GLO_SDATA, SEL_GPS_0), + PINMUX_IPSR_MSEL(IP9_15_12, VI1_DATA7_VI1_B7_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP9_15_12, IIC1_SDA_B, SEL_IIC1_1), + PINMUX_IPSR_MSEL(IP9_15_12, I2C1_SDA_B, SEL_I2C1_1), + PINMUX_IPSR_MSEL(IP9_15_12, VI2_DATA7_VI2_B7_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP9_17_16, SD1_CLK), PINMUX_IPSR_DATA(IP9_17_16, AVB_TX_EN), PINMUX_IPSR_DATA(IP9_19_18, SD1_CMD), PINMUX_IPSR_DATA(IP9_19_18, AVB_TX_ER), - PINMUX_IPSR_MODSEL_DATA(IP9_19_18, SCIFB0_SCK_B, SEL_SCIFB_1), + PINMUX_IPSR_MSEL(IP9_19_18, SCIFB0_SCK_B, SEL_SCIFB_1), PINMUX_IPSR_DATA(IP9_21_20, SD1_DAT0), PINMUX_IPSR_DATA(IP9_21_20, AVB_TX_CLK), - PINMUX_IPSR_MODSEL_DATA(IP9_21_20, SCIFB0_RXD_B, SEL_SCIFB_1), + PINMUX_IPSR_MSEL(IP9_21_20, SCIFB0_RXD_B, SEL_SCIFB_1), PINMUX_IPSR_DATA(IP9_23_22, SD1_DAT1), PINMUX_IPSR_DATA(IP9_23_22, AVB_LINK), - PINMUX_IPSR_MODSEL_DATA(IP9_23_22, SCIFB0_TXD_B, SEL_SCIFB_1), + PINMUX_IPSR_MSEL(IP9_23_22, SCIFB0_TXD_B, SEL_SCIFB_1), PINMUX_IPSR_DATA(IP9_25_24, SD1_DAT2), PINMUX_IPSR_DATA(IP9_25_24, AVB_COL), - PINMUX_IPSR_MODSEL_DATA(IP9_25_24, SCIFB0_CTS_N_B, SEL_SCIFB_1), + PINMUX_IPSR_MSEL(IP9_25_24, SCIFB0_CTS_N_B, SEL_SCIFB_1), PINMUX_IPSR_DATA(IP9_27_26, SD1_DAT3), PINMUX_IPSR_DATA(IP9_27_26, AVB_RXD0), - PINMUX_IPSR_MODSEL_DATA(IP9_27_26, SCIFB0_RTS_N_B, SEL_SCIFB_1), + PINMUX_IPSR_MSEL(IP9_27_26, SCIFB0_RTS_N_B, SEL_SCIFB_1), PINMUX_IPSR_DATA(IP9_31_28, SD1_CD), PINMUX_IPSR_DATA(IP9_31_28, MMC1_D6), - PINMUX_IPSR_MODSEL_DATA(IP9_31_28, TS_SDEN1, SEL_TSIF1_0), + PINMUX_IPSR_MSEL(IP9_31_28, TS_SDEN1, SEL_TSIF1_0), PINMUX_IPSR_DATA(IP9_31_28, USB1_EXTP), - PINMUX_IPSR_MODSEL_DATA(IP9_31_28, GLO_SS, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP9_31_28, VI0_CLK_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP9_31_28, IIC2_SCL_D, SEL_IIC2_3), - PINMUX_IPSR_MODSEL_DATA(IP9_31_28, I2C2_SCL_D, SEL_I2C2_3), - PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SIM0_CLK_B, SEL_SIM_1), - PINMUX_IPSR_MODSEL_DATA(IP9_31_28, VI3_CLK_B, SEL_VI3_1), + PINMUX_IPSR_MSEL(IP9_31_28, GLO_SS, SEL_GPS_0), + PINMUX_IPSR_MSEL(IP9_31_28, VI0_CLK_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP9_31_28, IIC2_SCL_D, SEL_IIC2_3), + PINMUX_IPSR_MSEL(IP9_31_28, I2C2_SCL_D, SEL_I2C2_3), + PINMUX_IPSR_MSEL(IP9_31_28, SIM0_CLK_B, SEL_SIM_1), + PINMUX_IPSR_MSEL(IP9_31_28, VI3_CLK_B, SEL_VI3_1), PINMUX_IPSR_DATA(IP10_3_0, SD1_WP), PINMUX_IPSR_DATA(IP10_3_0, MMC1_D7), - PINMUX_IPSR_MODSEL_DATA(IP10_3_0, TS_SPSYNC1, SEL_TSIF1_0), + PINMUX_IPSR_MSEL(IP10_3_0, TS_SPSYNC1, SEL_TSIF1_0), PINMUX_IPSR_DATA(IP10_3_0, USB1_IDIN), - PINMUX_IPSR_MODSEL_DATA(IP10_3_0, GLO_RFON, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP10_3_0, VI1_CLK_B, SEL_VI1_1), - PINMUX_IPSR_MODSEL_DATA(IP10_3_0, IIC2_SDA_D, SEL_IIC2_3), - PINMUX_IPSR_MODSEL_DATA(IP10_3_0, I2C2_SDA_D, SEL_I2C2_3), - PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SIM0_D_B, SEL_SIM_1), + PINMUX_IPSR_MSEL(IP10_3_0, GLO_RFON, SEL_GPS_0), + PINMUX_IPSR_MSEL(IP10_3_0, VI1_CLK_B, SEL_VI1_1), + PINMUX_IPSR_MSEL(IP10_3_0, IIC2_SDA_D, SEL_IIC2_3), + PINMUX_IPSR_MSEL(IP10_3_0, I2C2_SDA_D, SEL_I2C2_3), + PINMUX_IPSR_MSEL(IP10_3_0, SIM0_D_B, SEL_SIM_1), PINMUX_IPSR_DATA(IP10_6_4, SD2_CLK), PINMUX_IPSR_DATA(IP10_6_4, MMC0_CLK), - PINMUX_IPSR_MODSEL_DATA(IP10_6_4, SIM0_CLK, SEL_SIM_0), - PINMUX_IPSR_MODSEL_DATA(IP10_6_4, VI0_DATA0_VI0_B0_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP10_6_4, TS_SDEN0_C, SEL_TSIF0_2), - PINMUX_IPSR_MODSEL_DATA(IP10_6_4, GLO_SCLK_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP10_6_4, VI3_DATA0_B, SEL_VI3_1), + PINMUX_IPSR_MSEL(IP10_6_4, SIM0_CLK, SEL_SIM_0), + PINMUX_IPSR_MSEL(IP10_6_4, VI0_DATA0_VI0_B0_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP10_6_4, TS_SDEN0_C, SEL_TSIF0_2), + PINMUX_IPSR_MSEL(IP10_6_4, GLO_SCLK_B, SEL_GPS_1), + PINMUX_IPSR_MSEL(IP10_6_4, VI3_DATA0_B, SEL_VI3_1), PINMUX_IPSR_DATA(IP10_10_7, SD2_CMD), PINMUX_IPSR_DATA(IP10_10_7, MMC0_CMD), - PINMUX_IPSR_MODSEL_DATA(IP10_10_7, SIM0_D, SEL_SIM_0), - PINMUX_IPSR_MODSEL_DATA(IP10_10_7, VI0_DATA1_VI0_B1_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP10_10_7, SCIFB1_SCK_E, SEL_SCIFB1_4), - PINMUX_IPSR_MODSEL_DATA(IP10_10_7, SCK1_D, SEL_SCIF1_3), - PINMUX_IPSR_MODSEL_DATA(IP10_10_7, TS_SPSYNC0_C, SEL_TSIF0_2), - PINMUX_IPSR_MODSEL_DATA(IP10_10_7, GLO_SDATA_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP10_10_7, VI3_DATA1_B, SEL_VI3_1), + PINMUX_IPSR_MSEL(IP10_10_7, SIM0_D, SEL_SIM_0), + PINMUX_IPSR_MSEL(IP10_10_7, VI0_DATA1_VI0_B1_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP10_10_7, SCIFB1_SCK_E, SEL_SCIFB1_4), + PINMUX_IPSR_MSEL(IP10_10_7, SCK1_D, SEL_SCIF1_3), + PINMUX_IPSR_MSEL(IP10_10_7, TS_SPSYNC0_C, SEL_TSIF0_2), + PINMUX_IPSR_MSEL(IP10_10_7, GLO_SDATA_B, SEL_GPS_1), + PINMUX_IPSR_MSEL(IP10_10_7, VI3_DATA1_B, SEL_VI3_1), PINMUX_IPSR_DATA(IP10_14_11, SD2_DAT0), PINMUX_IPSR_DATA(IP10_14_11, MMC0_D0), - PINMUX_IPSR_MODSEL_DATA(IP10_14_11, FMCLK_B, SEL_FM_1), - PINMUX_IPSR_MODSEL_DATA(IP10_14_11, VI0_DATA2_VI0_B2_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP10_14_11, SCIFB1_RXD_E, SEL_SCIFB1_4), - PINMUX_IPSR_MODSEL_DATA(IP10_14_11, RX1_D, SEL_SCIF1_3), - PINMUX_IPSR_MODSEL_DATA(IP10_14_11, TS_SDAT0_C, SEL_TSIF0_2), - PINMUX_IPSR_MODSEL_DATA(IP10_14_11, GLO_SS_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP10_14_11, VI3_DATA2_B, SEL_VI3_1), + PINMUX_IPSR_MSEL(IP10_14_11, FMCLK_B, SEL_FM_1), + PINMUX_IPSR_MSEL(IP10_14_11, VI0_DATA2_VI0_B2_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP10_14_11, SCIFB1_RXD_E, SEL_SCIFB1_4), + PINMUX_IPSR_MSEL(IP10_14_11, RX1_D, SEL_SCIF1_3), + PINMUX_IPSR_MSEL(IP10_14_11, TS_SDAT0_C, SEL_TSIF0_2), + PINMUX_IPSR_MSEL(IP10_14_11, GLO_SS_B, SEL_GPS_1), + PINMUX_IPSR_MSEL(IP10_14_11, VI3_DATA2_B, SEL_VI3_1), PINMUX_IPSR_DATA(IP10_18_15, SD2_DAT1), PINMUX_IPSR_DATA(IP10_18_15, MMC0_D1), - PINMUX_IPSR_MODSEL_DATA(IP10_18_15, FMIN_B, SEL_FM_1), - PINMUX_IPSR_MODSEL_DATA(IP10_18_15, VI0_DATA3_VI0_B3_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP10_18_15, SCIFB1_TXD_E, SEL_SCIFB1_4), - PINMUX_IPSR_MODSEL_DATA(IP10_18_15, TX1_D, SEL_SCIF1_3), - PINMUX_IPSR_MODSEL_DATA(IP10_18_15, TS_SCK0_C, SEL_TSIF0_2), - PINMUX_IPSR_MODSEL_DATA(IP10_18_15, GLO_RFON_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP10_18_15, VI3_DATA3_B, SEL_VI3_1), + PINMUX_IPSR_MSEL(IP10_18_15, FMIN_B, SEL_FM_1), + PINMUX_IPSR_MSEL(IP10_18_15, VI0_DATA3_VI0_B3_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP10_18_15, SCIFB1_TXD_E, SEL_SCIFB1_4), + PINMUX_IPSR_MSEL(IP10_18_15, TX1_D, SEL_SCIF1_3), + PINMUX_IPSR_MSEL(IP10_18_15, TS_SCK0_C, SEL_TSIF0_2), + PINMUX_IPSR_MSEL(IP10_18_15, GLO_RFON_B, SEL_GPS_1), + PINMUX_IPSR_MSEL(IP10_18_15, VI3_DATA3_B, SEL_VI3_1), PINMUX_IPSR_DATA(IP10_22_19, SD2_DAT2), PINMUX_IPSR_DATA(IP10_22_19, MMC0_D2), - PINMUX_IPSR_MODSEL_DATA(IP10_22_19, BPFCLK_B, SEL_FM_1), - PINMUX_IPSR_MODSEL_DATA(IP10_22_19, VI0_DATA4_VI0_B4_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP10_22_19, HRX0_D, SEL_HSCIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP10_22_19, TS_SDEN1_B, SEL_TSIF1_1), - PINMUX_IPSR_MODSEL_DATA(IP10_22_19, GLO_Q0_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP10_22_19, VI3_DATA4_B, SEL_VI3_1), + PINMUX_IPSR_MSEL(IP10_22_19, BPFCLK_B, SEL_FM_1), + PINMUX_IPSR_MSEL(IP10_22_19, VI0_DATA4_VI0_B4_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP10_22_19, HRX0_D, SEL_HSCIF0_3), + PINMUX_IPSR_MSEL(IP10_22_19, TS_SDEN1_B, SEL_TSIF1_1), + PINMUX_IPSR_MSEL(IP10_22_19, GLO_Q0_B, SEL_GPS_1), + PINMUX_IPSR_MSEL(IP10_22_19, VI3_DATA4_B, SEL_VI3_1), PINMUX_IPSR_DATA(IP10_25_23, SD2_DAT3), PINMUX_IPSR_DATA(IP10_25_23, MMC0_D3), - PINMUX_IPSR_MODSEL_DATA(IP10_25_23, SIM0_RST, SEL_SIM_0), - PINMUX_IPSR_MODSEL_DATA(IP10_25_23, VI0_DATA5_VI0_B5_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP10_25_23, HTX0_D, SEL_HSCIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP10_25_23, TS_SPSYNC1_B, SEL_TSIF1_1), - PINMUX_IPSR_MODSEL_DATA(IP10_25_23, GLO_Q1_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP10_25_23, VI3_DATA5_B, SEL_VI3_1), + PINMUX_IPSR_MSEL(IP10_25_23, SIM0_RST, SEL_SIM_0), + PINMUX_IPSR_MSEL(IP10_25_23, VI0_DATA5_VI0_B5_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP10_25_23, HTX0_D, SEL_HSCIF0_3), + PINMUX_IPSR_MSEL(IP10_25_23, TS_SPSYNC1_B, SEL_TSIF1_1), + PINMUX_IPSR_MSEL(IP10_25_23, GLO_Q1_B, SEL_GPS_1), + PINMUX_IPSR_MSEL(IP10_25_23, VI3_DATA5_B, SEL_VI3_1), PINMUX_IPSR_DATA(IP10_29_26, SD2_CD), PINMUX_IPSR_DATA(IP10_29_26, MMC0_D4), - PINMUX_IPSR_MODSEL_DATA(IP10_29_26, TS_SDAT0_B, SEL_TSIF0_1), + PINMUX_IPSR_MSEL(IP10_29_26, TS_SDAT0_B, SEL_TSIF0_1), PINMUX_IPSR_DATA(IP10_29_26, USB2_EXTP), - PINMUX_IPSR_MODSEL_DATA(IP10_29_26, GLO_I0, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP10_29_26, VI0_DATA6_VI0_B6_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP10_29_26, HCTS0_N_D, SEL_HSCIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP10_29_26, TS_SDAT1_B, SEL_TSIF1_1), - PINMUX_IPSR_MODSEL_DATA(IP10_29_26, GLO_I0_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP10_29_26, VI3_DATA6_B, SEL_VI3_1), + PINMUX_IPSR_MSEL(IP10_29_26, GLO_I0, SEL_GPS_0), + PINMUX_IPSR_MSEL(IP10_29_26, VI0_DATA6_VI0_B6_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP10_29_26, HCTS0_N_D, SEL_HSCIF0_3), + PINMUX_IPSR_MSEL(IP10_29_26, TS_SDAT1_B, SEL_TSIF1_1), + PINMUX_IPSR_MSEL(IP10_29_26, GLO_I0_B, SEL_GPS_1), + PINMUX_IPSR_MSEL(IP10_29_26, VI3_DATA6_B, SEL_VI3_1), PINMUX_IPSR_DATA(IP11_3_0, SD2_WP), PINMUX_IPSR_DATA(IP11_3_0, MMC0_D5), - PINMUX_IPSR_MODSEL_DATA(IP11_3_0, TS_SCK0_B, SEL_TSIF0_1), + PINMUX_IPSR_MSEL(IP11_3_0, TS_SCK0_B, SEL_TSIF0_1), PINMUX_IPSR_DATA(IP11_3_0, USB2_IDIN), - PINMUX_IPSR_MODSEL_DATA(IP11_3_0, GLO_I1, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP11_3_0, VI0_DATA7_VI0_B7_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP11_3_0, HRTS0_N_D, SEL_HSCIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP11_3_0, TS_SCK1_B, SEL_TSIF1_1), - PINMUX_IPSR_MODSEL_DATA(IP11_3_0, GLO_I1_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP11_3_0, VI3_DATA7_B, SEL_VI3_1), + PINMUX_IPSR_MSEL(IP11_3_0, GLO_I1, SEL_GPS_0), + PINMUX_IPSR_MSEL(IP11_3_0, VI0_DATA7_VI0_B7_B, SEL_VI0_1), + PINMUX_IPSR_MSEL(IP11_3_0, HRTS0_N_D, SEL_HSCIF0_3), + PINMUX_IPSR_MSEL(IP11_3_0, TS_SCK1_B, SEL_TSIF1_1), + PINMUX_IPSR_MSEL(IP11_3_0, GLO_I1_B, SEL_GPS_1), + PINMUX_IPSR_MSEL(IP11_3_0, VI3_DATA7_B, SEL_VI3_1), PINMUX_IPSR_DATA(IP11_4, SD3_CLK), PINMUX_IPSR_DATA(IP11_4, MMC1_CLK), PINMUX_IPSR_DATA(IP11_6_5, SD3_CMD), @@ -1447,298 +1447,298 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_DATA(IP11_14_13, SCKZ), PINMUX_IPSR_DATA(IP11_17_15, SD3_CD), PINMUX_IPSR_DATA(IP11_17_15, MMC1_D4), - PINMUX_IPSR_MODSEL_DATA(IP11_17_15, TS_SDAT1, SEL_TSIF1_0), + PINMUX_IPSR_MSEL(IP11_17_15, TS_SDAT1, SEL_TSIF1_0), PINMUX_IPSR_DATA(IP11_17_15, VSP), - PINMUX_IPSR_MODSEL_DATA(IP11_17_15, GLO_Q0, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP11_17_15, SIM0_RST_B, SEL_SIM_1), + PINMUX_IPSR_MSEL(IP11_17_15, GLO_Q0, SEL_GPS_0), + PINMUX_IPSR_MSEL(IP11_17_15, SIM0_RST_B, SEL_SIM_1), PINMUX_IPSR_DATA(IP11_21_18, SD3_WP), PINMUX_IPSR_DATA(IP11_21_18, MMC1_D5), - PINMUX_IPSR_MODSEL_DATA(IP11_21_18, TS_SCK1, SEL_TSIF1_0), - PINMUX_IPSR_MODSEL_DATA(IP11_21_18, GLO_Q1, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_C, SEL_FM_2), - PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_E, SEL_FM_4), - PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_F, SEL_FM_5), + PINMUX_IPSR_MSEL(IP11_21_18, TS_SCK1, SEL_TSIF1_0), + PINMUX_IPSR_MSEL(IP11_21_18, GLO_Q1, SEL_GPS_0), + PINMUX_IPSR_MSEL(IP11_21_18, FMIN_C, SEL_FM_2), + PINMUX_IPSR_MSEL(IP11_21_18, FMIN_E, SEL_FM_4), + PINMUX_IPSR_MSEL(IP11_21_18, FMIN_F, SEL_FM_5), PINMUX_IPSR_DATA(IP11_23_22, MLB_CLK), - PINMUX_IPSR_MODSEL_DATA(IP11_23_22, IIC2_SCL_B, SEL_IIC2_1), - PINMUX_IPSR_MODSEL_DATA(IP11_23_22, I2C2_SCL_B, SEL_I2C2_1), + PINMUX_IPSR_MSEL(IP11_23_22, IIC2_SCL_B, SEL_IIC2_1), + PINMUX_IPSR_MSEL(IP11_23_22, I2C2_SCL_B, SEL_I2C2_1), PINMUX_IPSR_DATA(IP11_26_24, MLB_SIG), - PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SCIFB1_RXD_D, SEL_SCIFB1_3), - PINMUX_IPSR_MODSEL_DATA(IP11_26_24, RX1_C, SEL_SCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP11_26_24, IIC2_SDA_B, SEL_IIC2_1), - PINMUX_IPSR_MODSEL_DATA(IP11_26_24, I2C2_SDA_B, SEL_I2C2_1), + PINMUX_IPSR_MSEL(IP11_26_24, SCIFB1_RXD_D, SEL_SCIFB1_3), + PINMUX_IPSR_MSEL(IP11_26_24, RX1_C, SEL_SCIF1_2), + PINMUX_IPSR_MSEL(IP11_26_24, IIC2_SDA_B, SEL_IIC2_1), + PINMUX_IPSR_MSEL(IP11_26_24, I2C2_SDA_B, SEL_I2C2_1), PINMUX_IPSR_DATA(IP11_29_27, MLB_DAT), - PINMUX_IPSR_MODSEL_DATA(IP11_29_27, SCIFB1_TXD_D, SEL_SCIFB1_3), - PINMUX_IPSR_MODSEL_DATA(IP11_29_27, TX1_C, SEL_SCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP11_29_27, BPFCLK_C, SEL_FM_2), + PINMUX_IPSR_MSEL(IP11_29_27, SCIFB1_TXD_D, SEL_SCIFB1_3), + PINMUX_IPSR_MSEL(IP11_29_27, TX1_C, SEL_SCIF1_2), + PINMUX_IPSR_MSEL(IP11_29_27, BPFCLK_C, SEL_FM_2), PINMUX_IPSR_DATA(IP11_31_30, SSI_SCK0129), - PINMUX_IPSR_MODSEL_DATA(IP11_31_30, CAN_CLK_B, SEL_CANCLK_1), + PINMUX_IPSR_MSEL(IP11_31_30, CAN_CLK_B, SEL_CANCLK_1), PINMUX_IPSR_DATA(IP11_31_30, MOUT0), PINMUX_IPSR_DATA(IP12_1_0, SSI_WS0129), - PINMUX_IPSR_MODSEL_DATA(IP12_1_0, CAN0_TX_B, SEL_CAN0_1), + PINMUX_IPSR_MSEL(IP12_1_0, CAN0_TX_B, SEL_CAN0_1), PINMUX_IPSR_DATA(IP12_1_0, MOUT1), PINMUX_IPSR_DATA(IP12_3_2, SSI_SDATA0), - PINMUX_IPSR_MODSEL_DATA(IP12_3_2, CAN0_RX_B, SEL_CAN0_1), + PINMUX_IPSR_MSEL(IP12_3_2, CAN0_RX_B, SEL_CAN0_1), PINMUX_IPSR_DATA(IP12_3_2, MOUT2), PINMUX_IPSR_DATA(IP12_5_4, SSI_SDATA1), - PINMUX_IPSR_MODSEL_DATA(IP12_5_4, CAN1_TX_B, SEL_CAN1_1), + PINMUX_IPSR_MSEL(IP12_5_4, CAN1_TX_B, SEL_CAN1_1), PINMUX_IPSR_DATA(IP12_5_4, MOUT5), PINMUX_IPSR_DATA(IP12_7_6, SSI_SDATA2), - PINMUX_IPSR_MODSEL_DATA(IP12_7_6, CAN1_RX_B, SEL_CAN1_1), + PINMUX_IPSR_MSEL(IP12_7_6, CAN1_RX_B, SEL_CAN1_1), PINMUX_IPSR_DATA(IP12_7_6, SSI_SCK1), PINMUX_IPSR_DATA(IP12_7_6, MOUT6), PINMUX_IPSR_DATA(IP12_10_8, SSI_SCK34), PINMUX_IPSR_DATA(IP12_10_8, STP_OPWM_0), - PINMUX_IPSR_MODSEL_DATA(IP12_10_8, SCIFB0_SCK, SEL_SCIFB_0), - PINMUX_IPSR_MODSEL_DATA(IP12_10_8, MSIOF1_SCK, SEL_SOF1_0), + PINMUX_IPSR_MSEL(IP12_10_8, SCIFB0_SCK, SEL_SCIFB_0), + PINMUX_IPSR_MSEL(IP12_10_8, MSIOF1_SCK, SEL_SOF1_0), PINMUX_IPSR_DATA(IP12_10_8, CAN_DEBUG_HW_TRIGGER), PINMUX_IPSR_DATA(IP12_13_11, SSI_WS34), - PINMUX_IPSR_MODSEL_DATA(IP12_13_11, STP_IVCXO27_0, SEL_SSP_0), - PINMUX_IPSR_MODSEL_DATA(IP12_13_11, SCIFB0_RXD, SEL_SCIFB_0), + PINMUX_IPSR_MSEL(IP12_13_11, STP_IVCXO27_0, SEL_SSP_0), + PINMUX_IPSR_MSEL(IP12_13_11, SCIFB0_RXD, SEL_SCIFB_0), PINMUX_IPSR_DATA(IP12_13_11, MSIOF1_SYNC), PINMUX_IPSR_DATA(IP12_13_11, CAN_STEP0), PINMUX_IPSR_DATA(IP12_16_14, SSI_SDATA3), - PINMUX_IPSR_MODSEL_DATA(IP12_16_14, STP_ISCLK_0, SEL_SSP_0), - PINMUX_IPSR_MODSEL_DATA(IP12_16_14, SCIFB0_TXD, SEL_SCIFB_0), - PINMUX_IPSR_MODSEL_DATA(IP12_16_14, MSIOF1_SS1, SEL_SOF1_0), + PINMUX_IPSR_MSEL(IP12_16_14, STP_ISCLK_0, SEL_SSP_0), + PINMUX_IPSR_MSEL(IP12_16_14, SCIFB0_TXD, SEL_SCIFB_0), + PINMUX_IPSR_MSEL(IP12_16_14, MSIOF1_SS1, SEL_SOF1_0), PINMUX_IPSR_DATA(IP12_16_14, CAN_TXCLK), PINMUX_IPSR_DATA(IP12_19_17, SSI_SCK4), - PINMUX_IPSR_MODSEL_DATA(IP12_19_17, STP_ISD_0, SEL_SSP_0), - PINMUX_IPSR_MODSEL_DATA(IP12_19_17, SCIFB0_CTS_N, SEL_SCIFB_0), - PINMUX_IPSR_MODSEL_DATA(IP12_19_17, MSIOF1_SS2, SEL_SOF1_0), - PINMUX_IPSR_MODSEL_DATA(IP12_19_17, SSI_SCK5_C, SEL_SSI5_2), + PINMUX_IPSR_MSEL(IP12_19_17, STP_ISD_0, SEL_SSP_0), + PINMUX_IPSR_MSEL(IP12_19_17, SCIFB0_CTS_N, SEL_SCIFB_0), + PINMUX_IPSR_MSEL(IP12_19_17, MSIOF1_SS2, SEL_SOF1_0), + PINMUX_IPSR_MSEL(IP12_19_17, SSI_SCK5_C, SEL_SSI5_2), PINMUX_IPSR_DATA(IP12_19_17, CAN_DEBUGOUT0), PINMUX_IPSR_DATA(IP12_22_20, SSI_WS4), - PINMUX_IPSR_MODSEL_DATA(IP12_22_20, STP_ISEN_0, SEL_SSP_0), - PINMUX_IPSR_MODSEL_DATA(IP12_22_20, SCIFB0_RTS_N, SEL_SCIFB_0), - PINMUX_IPSR_MODSEL_DATA(IP12_22_20, MSIOF1_TXD, SEL_SOF1_0), - PINMUX_IPSR_MODSEL_DATA(IP12_22_20, SSI_WS5_C, SEL_SSI5_2), + PINMUX_IPSR_MSEL(IP12_22_20, STP_ISEN_0, SEL_SSP_0), + PINMUX_IPSR_MSEL(IP12_22_20, SCIFB0_RTS_N, SEL_SCIFB_0), + PINMUX_IPSR_MSEL(IP12_22_20, MSIOF1_TXD, SEL_SOF1_0), + PINMUX_IPSR_MSEL(IP12_22_20, SSI_WS5_C, SEL_SSI5_2), PINMUX_IPSR_DATA(IP12_22_20, CAN_DEBUGOUT1), PINMUX_IPSR_DATA(IP12_24_23, SSI_SDATA4), - PINMUX_IPSR_MODSEL_DATA(IP12_24_23, STP_ISSYNC_0, SEL_SSP_0), - PINMUX_IPSR_MODSEL_DATA(IP12_24_23, MSIOF1_RXD, SEL_SOF1_0), + PINMUX_IPSR_MSEL(IP12_24_23, STP_ISSYNC_0, SEL_SSP_0), + PINMUX_IPSR_MSEL(IP12_24_23, MSIOF1_RXD, SEL_SOF1_0), PINMUX_IPSR_DATA(IP12_24_23, CAN_DEBUGOUT2), - PINMUX_IPSR_MODSEL_DATA(IP12_27_25, SSI_SCK5, SEL_SSI5_0), - PINMUX_IPSR_MODSEL_DATA(IP12_27_25, SCIFB1_SCK, SEL_SCIFB1_0), - PINMUX_IPSR_MODSEL_DATA(IP12_27_25, IERX_B, SEL_IEB_1), + PINMUX_IPSR_MSEL(IP12_27_25, SSI_SCK5, SEL_SSI5_0), + PINMUX_IPSR_MSEL(IP12_27_25, SCIFB1_SCK, SEL_SCIFB1_0), + PINMUX_IPSR_MSEL(IP12_27_25, IERX_B, SEL_IEB_1), PINMUX_IPSR_DATA(IP12_27_25, DU2_EXHSYNC_DU2_HSYNC), PINMUX_IPSR_DATA(IP12_27_25, QSTH_QHS), PINMUX_IPSR_DATA(IP12_27_25, CAN_DEBUGOUT3), - PINMUX_IPSR_MODSEL_DATA(IP12_30_28, SSI_WS5, SEL_SSI5_0), - PINMUX_IPSR_MODSEL_DATA(IP12_30_28, SCIFB1_RXD, SEL_SCIFB1_0), - PINMUX_IPSR_MODSEL_DATA(IP12_30_28, IECLK_B, SEL_IEB_1), + PINMUX_IPSR_MSEL(IP12_30_28, SSI_WS5, SEL_SSI5_0), + PINMUX_IPSR_MSEL(IP12_30_28, SCIFB1_RXD, SEL_SCIFB1_0), + PINMUX_IPSR_MSEL(IP12_30_28, IECLK_B, SEL_IEB_1), PINMUX_IPSR_DATA(IP12_30_28, DU2_EXVSYNC_DU2_VSYNC), PINMUX_IPSR_DATA(IP12_30_28, QSTB_QHE), PINMUX_IPSR_DATA(IP12_30_28, CAN_DEBUGOUT4), - PINMUX_IPSR_MODSEL_DATA(IP13_2_0, SSI_SDATA5, SEL_SSI5_0), - PINMUX_IPSR_MODSEL_DATA(IP13_2_0, SCIFB1_TXD, SEL_SCIFB1_0), - PINMUX_IPSR_MODSEL_DATA(IP13_2_0, IETX_B, SEL_IEB_1), + PINMUX_IPSR_MSEL(IP13_2_0, SSI_SDATA5, SEL_SSI5_0), + PINMUX_IPSR_MSEL(IP13_2_0, SCIFB1_TXD, SEL_SCIFB1_0), + PINMUX_IPSR_MSEL(IP13_2_0, IETX_B, SEL_IEB_1), PINMUX_IPSR_DATA(IP13_2_0, DU2_DR2), PINMUX_IPSR_DATA(IP13_2_0, LCDOUT2), PINMUX_IPSR_DATA(IP13_2_0, CAN_DEBUGOUT5), - PINMUX_IPSR_MODSEL_DATA(IP13_6_3, SSI_SCK6, SEL_SSI6_0), - PINMUX_IPSR_MODSEL_DATA(IP13_6_3, SCIFB1_CTS_N, SEL_SCIFB1_0), - PINMUX_IPSR_MODSEL_DATA(IP13_6_3, BPFCLK_D, SEL_FM_3), + PINMUX_IPSR_MSEL(IP13_6_3, SSI_SCK6, SEL_SSI6_0), + PINMUX_IPSR_MSEL(IP13_6_3, SCIFB1_CTS_N, SEL_SCIFB1_0), + PINMUX_IPSR_MSEL(IP13_6_3, BPFCLK_D, SEL_FM_3), PINMUX_IPSR_DATA(IP13_6_3, DU2_DR3), PINMUX_IPSR_DATA(IP13_6_3, LCDOUT3), PINMUX_IPSR_DATA(IP13_6_3, CAN_DEBUGOUT6), - PINMUX_IPSR_MODSEL_DATA(IP13_6_3, BPFCLK_F, SEL_FM_5), - PINMUX_IPSR_MODSEL_DATA(IP13_9_7, SSI_WS6, SEL_SSI6_0), - PINMUX_IPSR_MODSEL_DATA(IP13_9_7, SCIFB1_RTS_N, SEL_SCIFB1_0), - PINMUX_IPSR_MODSEL_DATA(IP13_9_7, CAN0_TX_D, SEL_CAN0_3), + PINMUX_IPSR_MSEL(IP13_6_3, BPFCLK_F, SEL_FM_5), + PINMUX_IPSR_MSEL(IP13_9_7, SSI_WS6, SEL_SSI6_0), + PINMUX_IPSR_MSEL(IP13_9_7, SCIFB1_RTS_N, SEL_SCIFB1_0), + PINMUX_IPSR_MSEL(IP13_9_7, CAN0_TX_D, SEL_CAN0_3), PINMUX_IPSR_DATA(IP13_9_7, DU2_DR4), PINMUX_IPSR_DATA(IP13_9_7, LCDOUT4), PINMUX_IPSR_DATA(IP13_9_7, CAN_DEBUGOUT7), - PINMUX_IPSR_MODSEL_DATA(IP13_12_10, SSI_SDATA6, SEL_SSI6_0), - PINMUX_IPSR_MODSEL_DATA(IP13_12_10, FMIN_D, SEL_FM_3), + PINMUX_IPSR_MSEL(IP13_12_10, SSI_SDATA6, SEL_SSI6_0), + PINMUX_IPSR_MSEL(IP13_12_10, FMIN_D, SEL_FM_3), PINMUX_IPSR_DATA(IP13_12_10, DU2_DR5), PINMUX_IPSR_DATA(IP13_12_10, LCDOUT5), PINMUX_IPSR_DATA(IP13_12_10, CAN_DEBUGOUT8), - PINMUX_IPSR_MODSEL_DATA(IP13_15_13, SSI_SCK78, SEL_SSI7_0), - PINMUX_IPSR_MODSEL_DATA(IP13_15_13, STP_IVCXO27_1, SEL_SSP_0), - PINMUX_IPSR_MODSEL_DATA(IP13_15_13, SCK1, SEL_SCIF1_0), - PINMUX_IPSR_MODSEL_DATA(IP13_15_13, SCIFA1_SCK, SEL_SCIFA1_0), + PINMUX_IPSR_MSEL(IP13_15_13, SSI_SCK78, SEL_SSI7_0), + PINMUX_IPSR_MSEL(IP13_15_13, STP_IVCXO27_1, SEL_SSP_0), + PINMUX_IPSR_MSEL(IP13_15_13, SCK1, SEL_SCIF1_0), + PINMUX_IPSR_MSEL(IP13_15_13, SCIFA1_SCK, SEL_SCIFA1_0), PINMUX_IPSR_DATA(IP13_15_13, DU2_DR6), PINMUX_IPSR_DATA(IP13_15_13, LCDOUT6), PINMUX_IPSR_DATA(IP13_15_13, CAN_DEBUGOUT9), - PINMUX_IPSR_MODSEL_DATA(IP13_18_16, SSI_WS78, SEL_SSI7_0), - PINMUX_IPSR_MODSEL_DATA(IP13_18_16, STP_ISCLK_1, SEL_SSP_0), - PINMUX_IPSR_MODSEL_DATA(IP13_18_16, SCIFB2_SCK, SEL_SCIFB2_0), + PINMUX_IPSR_MSEL(IP13_18_16, SSI_WS78, SEL_SSI7_0), + PINMUX_IPSR_MSEL(IP13_18_16, STP_ISCLK_1, SEL_SSP_0), + PINMUX_IPSR_MSEL(IP13_18_16, SCIFB2_SCK, SEL_SCIFB2_0), PINMUX_IPSR_DATA(IP13_18_16, SCIFA2_CTS_N), PINMUX_IPSR_DATA(IP13_18_16, DU2_DR7), PINMUX_IPSR_DATA(IP13_18_16, LCDOUT7), PINMUX_IPSR_DATA(IP13_18_16, CAN_DEBUGOUT10), - PINMUX_IPSR_MODSEL_DATA(IP13_22_19, SSI_SDATA7, SEL_SSI7_0), - PINMUX_IPSR_MODSEL_DATA(IP13_22_19, STP_ISD_1, SEL_SSP_0), - PINMUX_IPSR_MODSEL_DATA(IP13_22_19, SCIFB2_RXD, SEL_SCIFB2_0), + PINMUX_IPSR_MSEL(IP13_22_19, SSI_SDATA7, SEL_SSI7_0), + PINMUX_IPSR_MSEL(IP13_22_19, STP_ISD_1, SEL_SSP_0), + PINMUX_IPSR_MSEL(IP13_22_19, SCIFB2_RXD, SEL_SCIFB2_0), PINMUX_IPSR_DATA(IP13_22_19, SCIFA2_RTS_N), PINMUX_IPSR_DATA(IP13_22_19, TCLK2), PINMUX_IPSR_DATA(IP13_22_19, QSTVA_QVS), PINMUX_IPSR_DATA(IP13_22_19, CAN_DEBUGOUT11), - PINMUX_IPSR_MODSEL_DATA(IP13_22_19, BPFCLK_E, SEL_FM_4), - PINMUX_IPSR_MODSEL_DATA(IP13_22_19, SSI_SDATA7_B, SEL_SSI7_1), - PINMUX_IPSR_MODSEL_DATA(IP13_22_19, FMIN_G, SEL_FM_6), - PINMUX_IPSR_MODSEL_DATA(IP13_25_23, SSI_SDATA8, SEL_SSI8_0), - PINMUX_IPSR_MODSEL_DATA(IP13_25_23, STP_ISEN_1, SEL_SSP_0), - PINMUX_IPSR_MODSEL_DATA(IP13_25_23, SCIFB2_TXD, SEL_SCIFB2_0), - PINMUX_IPSR_MODSEL_DATA(IP13_25_23, CAN0_TX_C, SEL_CAN0_2), + PINMUX_IPSR_MSEL(IP13_22_19, BPFCLK_E, SEL_FM_4), + PINMUX_IPSR_MSEL(IP13_22_19, SSI_SDATA7_B, SEL_SSI7_1), + PINMUX_IPSR_MSEL(IP13_22_19, FMIN_G, SEL_FM_6), + PINMUX_IPSR_MSEL(IP13_25_23, SSI_SDATA8, SEL_SSI8_0), + PINMUX_IPSR_MSEL(IP13_25_23, STP_ISEN_1, SEL_SSP_0), + PINMUX_IPSR_MSEL(IP13_25_23, SCIFB2_TXD, SEL_SCIFB2_0), + PINMUX_IPSR_MSEL(IP13_25_23, CAN0_TX_C, SEL_CAN0_2), PINMUX_IPSR_DATA(IP13_25_23, CAN_DEBUGOUT12), - PINMUX_IPSR_MODSEL_DATA(IP13_25_23, SSI_SDATA8_B, SEL_SSI8_1), + PINMUX_IPSR_MSEL(IP13_25_23, SSI_SDATA8_B, SEL_SSI8_1), PINMUX_IPSR_DATA(IP13_28_26, SSI_SDATA9), - PINMUX_IPSR_MODSEL_DATA(IP13_28_26, STP_ISSYNC_1, SEL_SSP_0), - PINMUX_IPSR_MODSEL_DATA(IP13_28_26, SCIFB2_CTS_N, SEL_SCIFB2_0), + PINMUX_IPSR_MSEL(IP13_28_26, STP_ISSYNC_1, SEL_SSP_0), + PINMUX_IPSR_MSEL(IP13_28_26, SCIFB2_CTS_N, SEL_SCIFB2_0), PINMUX_IPSR_DATA(IP13_28_26, SSI_WS1), - PINMUX_IPSR_MODSEL_DATA(IP13_28_26, SSI_SDATA5_C, SEL_SSI5_2), + PINMUX_IPSR_MSEL(IP13_28_26, SSI_SDATA5_C, SEL_SSI5_2), PINMUX_IPSR_DATA(IP13_28_26, CAN_DEBUGOUT13), PINMUX_IPSR_DATA(IP13_30_29, AUDIO_CLKA), - PINMUX_IPSR_MODSEL_DATA(IP13_30_29, SCIFB2_RTS_N, SEL_SCIFB2_0), + PINMUX_IPSR_MSEL(IP13_30_29, SCIFB2_RTS_N, SEL_SCIFB2_0), PINMUX_IPSR_DATA(IP13_30_29, CAN_DEBUGOUT14), PINMUX_IPSR_DATA(IP14_2_0, AUDIO_CLKB), - PINMUX_IPSR_MODSEL_DATA(IP14_2_0, SCIF_CLK, SEL_SCIFCLK_0), - PINMUX_IPSR_MODSEL_DATA(IP14_2_0, CAN0_RX_D, SEL_CAN0_3), + PINMUX_IPSR_MSEL(IP14_2_0, SCIF_CLK, SEL_SCIFCLK_0), + PINMUX_IPSR_MSEL(IP14_2_0, CAN0_RX_D, SEL_CAN0_3), PINMUX_IPSR_DATA(IP14_2_0, DVC_MUTE), - PINMUX_IPSR_MODSEL_DATA(IP14_2_0, CAN0_RX_C, SEL_CAN0_2), + PINMUX_IPSR_MSEL(IP14_2_0, CAN0_RX_C, SEL_CAN0_2), PINMUX_IPSR_DATA(IP14_2_0, CAN_DEBUGOUT15), PINMUX_IPSR_DATA(IP14_2_0, REMOCON), - PINMUX_IPSR_MODSEL_DATA(IP14_5_3, SCIFA0_SCK, SEL_SCFA_0), - PINMUX_IPSR_MODSEL_DATA(IP14_5_3, HSCK1, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP14_5_3, SCIFA0_SCK, SEL_SCFA_0), + PINMUX_IPSR_MSEL(IP14_5_3, HSCK1, SEL_HSCIF1_0), PINMUX_IPSR_DATA(IP14_5_3, SCK0), PINMUX_IPSR_DATA(IP14_5_3, MSIOF3_SS2), PINMUX_IPSR_DATA(IP14_5_3, DU2_DG2), PINMUX_IPSR_DATA(IP14_5_3, LCDOUT10), - PINMUX_IPSR_MODSEL_DATA(IP14_5_3, IIC1_SDA_C, SEL_IIC1_2), - PINMUX_IPSR_MODSEL_DATA(IP14_5_3, I2C1_SDA_C, SEL_I2C1_2), - PINMUX_IPSR_MODSEL_DATA(IP14_8_6, SCIFA0_RXD, SEL_SCFA_0), - PINMUX_IPSR_MODSEL_DATA(IP14_8_6, HRX1, SEL_HSCIF1_0), - PINMUX_IPSR_MODSEL_DATA(IP14_8_6, RX0, SEL_SCIF0_0), + PINMUX_IPSR_MSEL(IP14_5_3, IIC1_SDA_C, SEL_IIC1_2), + PINMUX_IPSR_MSEL(IP14_5_3, I2C1_SDA_C, SEL_I2C1_2), + PINMUX_IPSR_MSEL(IP14_8_6, SCIFA0_RXD, SEL_SCFA_0), + PINMUX_IPSR_MSEL(IP14_8_6, HRX1, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP14_8_6, RX0, SEL_SCIF0_0), PINMUX_IPSR_DATA(IP14_8_6, DU2_DR0), PINMUX_IPSR_DATA(IP14_8_6, LCDOUT0), - PINMUX_IPSR_MODSEL_DATA(IP14_11_9, SCIFA0_TXD, SEL_SCFA_0), - PINMUX_IPSR_MODSEL_DATA(IP14_11_9, HTX1, SEL_HSCIF1_0), - PINMUX_IPSR_MODSEL_DATA(IP14_11_9, TX0, SEL_SCIF0_0), + PINMUX_IPSR_MSEL(IP14_11_9, SCIFA0_TXD, SEL_SCFA_0), + PINMUX_IPSR_MSEL(IP14_11_9, HTX1, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP14_11_9, TX0, SEL_SCIF0_0), PINMUX_IPSR_DATA(IP14_11_9, DU2_DR1), PINMUX_IPSR_DATA(IP14_11_9, LCDOUT1), - PINMUX_IPSR_MODSEL_DATA(IP14_15_12, SCIFA0_CTS_N, SEL_SCFA_0), - PINMUX_IPSR_MODSEL_DATA(IP14_15_12, HCTS1_N, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP14_15_12, SCIFA0_CTS_N, SEL_SCFA_0), + PINMUX_IPSR_MSEL(IP14_15_12, HCTS1_N, SEL_HSCIF1_0), PINMUX_IPSR_DATA(IP14_15_12, CTS0_N), - PINMUX_IPSR_MODSEL_DATA(IP14_15_12, MSIOF3_SYNC, SEL_SOF3_0), + PINMUX_IPSR_MSEL(IP14_15_12, MSIOF3_SYNC, SEL_SOF3_0), PINMUX_IPSR_DATA(IP14_15_12, DU2_DG3), PINMUX_IPSR_DATA(IP14_15_12, LCDOUT11), PINMUX_IPSR_DATA(IP14_15_12, PWM0_B), - PINMUX_IPSR_MODSEL_DATA(IP14_15_12, IIC1_SCL_C, SEL_IIC1_2), - PINMUX_IPSR_MODSEL_DATA(IP14_15_12, I2C1_SCL_C, SEL_I2C1_2), - PINMUX_IPSR_MODSEL_DATA(IP14_18_16, SCIFA0_RTS_N, SEL_SCFA_0), - PINMUX_IPSR_MODSEL_DATA(IP14_18_16, HRTS1_N, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP14_15_12, IIC1_SCL_C, SEL_IIC1_2), + PINMUX_IPSR_MSEL(IP14_15_12, I2C1_SCL_C, SEL_I2C1_2), + PINMUX_IPSR_MSEL(IP14_18_16, SCIFA0_RTS_N, SEL_SCFA_0), + PINMUX_IPSR_MSEL(IP14_18_16, HRTS1_N, SEL_HSCIF1_0), PINMUX_IPSR_DATA(IP14_18_16, RTS0_N), PINMUX_IPSR_DATA(IP14_18_16, MSIOF3_SS1), PINMUX_IPSR_DATA(IP14_18_16, DU2_DG0), PINMUX_IPSR_DATA(IP14_18_16, LCDOUT8), PINMUX_IPSR_DATA(IP14_18_16, PWM1_B), - PINMUX_IPSR_MODSEL_DATA(IP14_21_19, SCIFA1_RXD, SEL_SCIFA1_0), - PINMUX_IPSR_MODSEL_DATA(IP14_21_19, AD_DI, SEL_ADI_0), - PINMUX_IPSR_MODSEL_DATA(IP14_21_19, RX1, SEL_SCIF1_0), + PINMUX_IPSR_MSEL(IP14_21_19, SCIFA1_RXD, SEL_SCIFA1_0), + PINMUX_IPSR_MSEL(IP14_21_19, AD_DI, SEL_ADI_0), + PINMUX_IPSR_MSEL(IP14_21_19, RX1, SEL_SCIF1_0), PINMUX_IPSR_DATA(IP14_21_19, DU2_EXODDF_DU2_ODDF_DISP_CDE), PINMUX_IPSR_DATA(IP14_21_19, QCPV_QDE), - PINMUX_IPSR_MODSEL_DATA(IP14_24_22, SCIFA1_TXD, SEL_SCIFA1_0), - PINMUX_IPSR_MODSEL_DATA(IP14_24_22, AD_DO, SEL_ADI_0), - PINMUX_IPSR_MODSEL_DATA(IP14_24_22, TX1, SEL_SCIF1_0), + PINMUX_IPSR_MSEL(IP14_24_22, SCIFA1_TXD, SEL_SCIFA1_0), + PINMUX_IPSR_MSEL(IP14_24_22, AD_DO, SEL_ADI_0), + PINMUX_IPSR_MSEL(IP14_24_22, TX1, SEL_SCIF1_0), PINMUX_IPSR_DATA(IP14_24_22, DU2_DG1), PINMUX_IPSR_DATA(IP14_24_22, LCDOUT9), - PINMUX_IPSR_MODSEL_DATA(IP14_27_25, SCIFA1_CTS_N, SEL_SCIFA1_0), - PINMUX_IPSR_MODSEL_DATA(IP14_27_25, AD_CLK, SEL_ADI_0), + PINMUX_IPSR_MSEL(IP14_27_25, SCIFA1_CTS_N, SEL_SCIFA1_0), + PINMUX_IPSR_MSEL(IP14_27_25, AD_CLK, SEL_ADI_0), PINMUX_IPSR_DATA(IP14_27_25, CTS1_N), - PINMUX_IPSR_MODSEL_DATA(IP14_27_25, MSIOF3_RXD, SEL_SOF3_0), + PINMUX_IPSR_MSEL(IP14_27_25, MSIOF3_RXD, SEL_SOF3_0), PINMUX_IPSR_DATA(IP14_27_25, DU0_DOTCLKOUT), PINMUX_IPSR_DATA(IP14_27_25, QCLK), - PINMUX_IPSR_MODSEL_DATA(IP14_30_28, SCIFA1_RTS_N, SEL_SCIFA1_0), - PINMUX_IPSR_MODSEL_DATA(IP14_30_28, AD_NCS_N, SEL_ADI_0), + PINMUX_IPSR_MSEL(IP14_30_28, SCIFA1_RTS_N, SEL_SCIFA1_0), + PINMUX_IPSR_MSEL(IP14_30_28, AD_NCS_N, SEL_ADI_0), PINMUX_IPSR_DATA(IP14_30_28, RTS1_N), - PINMUX_IPSR_MODSEL_DATA(IP14_30_28, MSIOF3_TXD, SEL_SOF3_0), + PINMUX_IPSR_MSEL(IP14_30_28, MSIOF3_TXD, SEL_SOF3_0), PINMUX_IPSR_DATA(IP14_30_28, DU1_DOTCLKOUT), PINMUX_IPSR_DATA(IP14_30_28, QSTVB_QVE), - PINMUX_IPSR_MODSEL_DATA(IP14_30_28, HRTS0_N_C, SEL_HSCIF0_2), + PINMUX_IPSR_MSEL(IP14_30_28, HRTS0_N_C, SEL_HSCIF0_2), - PINMUX_IPSR_MODSEL_DATA(IP15_2_0, SCIFA2_SCK, SEL_SCIFA2_0), - PINMUX_IPSR_MODSEL_DATA(IP15_2_0, FMCLK, SEL_FM_0), + PINMUX_IPSR_MSEL(IP15_2_0, SCIFA2_SCK, SEL_SCIFA2_0), + PINMUX_IPSR_MSEL(IP15_2_0, FMCLK, SEL_FM_0), PINMUX_IPSR_DATA(IP15_2_0, SCK2), - PINMUX_IPSR_MODSEL_DATA(IP15_2_0, MSIOF3_SCK, SEL_SOF3_0), + PINMUX_IPSR_MSEL(IP15_2_0, MSIOF3_SCK, SEL_SOF3_0), PINMUX_IPSR_DATA(IP15_2_0, DU2_DG7), PINMUX_IPSR_DATA(IP15_2_0, LCDOUT15), - PINMUX_IPSR_MODSEL_DATA(IP15_2_0, SCIF_CLK_B, SEL_SCIFCLK_1), - PINMUX_IPSR_MODSEL_DATA(IP15_5_3, SCIFA2_RXD, SEL_SCIFA2_0), - PINMUX_IPSR_MODSEL_DATA(IP15_5_3, FMIN, SEL_FM_0), - PINMUX_IPSR_MODSEL_DATA(IP15_5_3, TX2, SEL_SCIF2_0), + PINMUX_IPSR_MSEL(IP15_2_0, SCIF_CLK_B, SEL_SCIFCLK_1), + PINMUX_IPSR_MSEL(IP15_5_3, SCIFA2_RXD, SEL_SCIFA2_0), + PINMUX_IPSR_MSEL(IP15_5_3, FMIN, SEL_FM_0), + PINMUX_IPSR_MSEL(IP15_5_3, TX2, SEL_SCIF2_0), PINMUX_IPSR_DATA(IP15_5_3, DU2_DB0), PINMUX_IPSR_DATA(IP15_5_3, LCDOUT16), - PINMUX_IPSR_MODSEL_DATA(IP15_5_3, IIC2_SCL, SEL_IIC2_0), - PINMUX_IPSR_MODSEL_DATA(IP15_5_3, I2C2_SCL, SEL_I2C2_0), - PINMUX_IPSR_MODSEL_DATA(IP15_8_6, SCIFA2_TXD, SEL_SCIFA2_0), - PINMUX_IPSR_MODSEL_DATA(IP15_8_6, BPFCLK, SEL_FM_0), - PINMUX_IPSR_MODSEL_DATA(IP15_8_6, RX2, SEL_SCIF2_0), + PINMUX_IPSR_MSEL(IP15_5_3, IIC2_SCL, SEL_IIC2_0), + PINMUX_IPSR_MSEL(IP15_5_3, I2C2_SCL, SEL_I2C2_0), + PINMUX_IPSR_MSEL(IP15_8_6, SCIFA2_TXD, SEL_SCIFA2_0), + PINMUX_IPSR_MSEL(IP15_8_6, BPFCLK, SEL_FM_0), + PINMUX_IPSR_MSEL(IP15_8_6, RX2, SEL_SCIF2_0), PINMUX_IPSR_DATA(IP15_8_6, DU2_DB1), PINMUX_IPSR_DATA(IP15_8_6, LCDOUT17), - PINMUX_IPSR_MODSEL_DATA(IP15_8_6, IIC2_SDA, SEL_IIC2_0), - PINMUX_IPSR_MODSEL_DATA(IP15_8_6, I2C2_SDA, SEL_I2C2_0), + PINMUX_IPSR_MSEL(IP15_8_6, IIC2_SDA, SEL_IIC2_0), + PINMUX_IPSR_MSEL(IP15_8_6, I2C2_SDA, SEL_I2C2_0), PINMUX_IPSR_DATA(IP15_11_9, HSCK0), - PINMUX_IPSR_MODSEL_DATA(IP15_11_9, TS_SDEN0, SEL_TSIF0_0), + PINMUX_IPSR_MSEL(IP15_11_9, TS_SDEN0, SEL_TSIF0_0), PINMUX_IPSR_DATA(IP15_11_9, DU2_DG4), PINMUX_IPSR_DATA(IP15_11_9, LCDOUT12), - PINMUX_IPSR_MODSEL_DATA(IP15_11_9, HCTS0_N_C, SEL_HSCIF0_2), - PINMUX_IPSR_MODSEL_DATA(IP15_13_12, HRX0, SEL_HSCIF0_0), + PINMUX_IPSR_MSEL(IP15_11_9, HCTS0_N_C, SEL_HSCIF0_2), + PINMUX_IPSR_MSEL(IP15_13_12, HRX0, SEL_HSCIF0_0), PINMUX_IPSR_DATA(IP15_13_12, DU2_DB2), PINMUX_IPSR_DATA(IP15_13_12, LCDOUT18), - PINMUX_IPSR_MODSEL_DATA(IP15_15_14, HTX0, SEL_HSCIF0_0), + PINMUX_IPSR_MSEL(IP15_15_14, HTX0, SEL_HSCIF0_0), PINMUX_IPSR_DATA(IP15_15_14, DU2_DB3), PINMUX_IPSR_DATA(IP15_15_14, LCDOUT19), - PINMUX_IPSR_MODSEL_DATA(IP15_17_16, HCTS0_N, SEL_HSCIF0_0), + PINMUX_IPSR_MSEL(IP15_17_16, HCTS0_N, SEL_HSCIF0_0), PINMUX_IPSR_DATA(IP15_17_16, SSI_SCK9), PINMUX_IPSR_DATA(IP15_17_16, DU2_DB4), PINMUX_IPSR_DATA(IP15_17_16, LCDOUT20), - PINMUX_IPSR_MODSEL_DATA(IP15_19_18, HRTS0_N, SEL_HSCIF0_0), + PINMUX_IPSR_MSEL(IP15_19_18, HRTS0_N, SEL_HSCIF0_0), PINMUX_IPSR_DATA(IP15_19_18, SSI_WS9), PINMUX_IPSR_DATA(IP15_19_18, DU2_DB5), PINMUX_IPSR_DATA(IP15_19_18, LCDOUT21), - PINMUX_IPSR_MODSEL_DATA(IP15_22_20, MSIOF0_SCK, SEL_SOF0_0), - PINMUX_IPSR_MODSEL_DATA(IP15_22_20, TS_SDAT0, SEL_TSIF0_0), + PINMUX_IPSR_MSEL(IP15_22_20, MSIOF0_SCK, SEL_SOF0_0), + PINMUX_IPSR_MSEL(IP15_22_20, TS_SDAT0, SEL_TSIF0_0), PINMUX_IPSR_DATA(IP15_22_20, ADICLK), PINMUX_IPSR_DATA(IP15_22_20, DU2_DB6), PINMUX_IPSR_DATA(IP15_22_20, LCDOUT22), PINMUX_IPSR_DATA(IP15_25_23, MSIOF0_SYNC), - PINMUX_IPSR_MODSEL_DATA(IP15_25_23, TS_SCK0, SEL_TSIF0_0), + PINMUX_IPSR_MSEL(IP15_25_23, TS_SCK0, SEL_TSIF0_0), PINMUX_IPSR_DATA(IP15_25_23, SSI_SCK2), PINMUX_IPSR_DATA(IP15_25_23, ADIDATA), PINMUX_IPSR_DATA(IP15_25_23, DU2_DB7), PINMUX_IPSR_DATA(IP15_25_23, LCDOUT23), - PINMUX_IPSR_MODSEL_DATA(IP15_25_23, HRX0_C, SEL_SCIFA2_1), - PINMUX_IPSR_MODSEL_DATA(IP15_27_26, MSIOF0_SS1, SEL_SOF0_0), + PINMUX_IPSR_MSEL(IP15_25_23, HRX0_C, SEL_SCIFA2_1), + PINMUX_IPSR_MSEL(IP15_27_26, MSIOF0_SS1, SEL_SOF0_0), PINMUX_IPSR_DATA(IP15_27_26, ADICHS0), PINMUX_IPSR_DATA(IP15_27_26, DU2_DG5), PINMUX_IPSR_DATA(IP15_27_26, LCDOUT13), - PINMUX_IPSR_MODSEL_DATA(IP15_29_28, MSIOF0_TXD, SEL_SOF0_0), + PINMUX_IPSR_MSEL(IP15_29_28, MSIOF0_TXD, SEL_SOF0_0), PINMUX_IPSR_DATA(IP15_29_28, ADICHS1), PINMUX_IPSR_DATA(IP15_29_28, DU2_DG6), PINMUX_IPSR_DATA(IP15_29_28, LCDOUT14), - PINMUX_IPSR_MODSEL_DATA(IP16_2_0, MSIOF0_SS2, SEL_SOF0_0), + PINMUX_IPSR_MSEL(IP16_2_0, MSIOF0_SS2, SEL_SOF0_0), PINMUX_IPSR_DATA(IP16_2_0, AUDIO_CLKOUT), PINMUX_IPSR_DATA(IP16_2_0, ADICHS2), PINMUX_IPSR_DATA(IP16_2_0, DU2_DISP), PINMUX_IPSR_DATA(IP16_2_0, QPOLA), - PINMUX_IPSR_MODSEL_DATA(IP16_2_0, HTX0_C, SEL_HSCIF0_2), - PINMUX_IPSR_MODSEL_DATA(IP16_2_0, SCIFA2_TXD_B, SEL_SCIFA2_1), - PINMUX_IPSR_MODSEL_DATA(IP16_5_3, MSIOF0_RXD, SEL_SOF0_0), - PINMUX_IPSR_MODSEL_DATA(IP16_5_3, TS_SPSYNC0, SEL_TSIF0_0), + PINMUX_IPSR_MSEL(IP16_2_0, HTX0_C, SEL_HSCIF0_2), + PINMUX_IPSR_MSEL(IP16_2_0, SCIFA2_TXD_B, SEL_SCIFA2_1), + PINMUX_IPSR_MSEL(IP16_5_3, MSIOF0_RXD, SEL_SOF0_0), + PINMUX_IPSR_MSEL(IP16_5_3, TS_SPSYNC0, SEL_TSIF0_0), PINMUX_IPSR_DATA(IP16_5_3, SSI_WS2), PINMUX_IPSR_DATA(IP16_5_3, ADICS_SAMP), PINMUX_IPSR_DATA(IP16_5_3, DU2_CDE), PINMUX_IPSR_DATA(IP16_5_3, QPOLB), - PINMUX_IPSR_MODSEL_DATA(IP16_5_3, SCIFA2_RXD_B, SEL_HSCIF0_2), + PINMUX_IPSR_MSEL(IP16_5_3, SCIFA2_RXD_B, SEL_HSCIF0_2), PINMUX_IPSR_DATA(IP16_6, USB1_PWEN), PINMUX_IPSR_DATA(IP16_6, AUDIO_CLKOUT_D), PINMUX_IPSR_DATA(IP16_7, USB1_OVC), - PINMUX_IPSR_MODSEL_DATA(IP16_7, TCLK1_B, SEL_TMU1_1), + PINMUX_IPSR_MSEL(IP16_7, TCLK1_B, SEL_TMU1_1), PINMUX_DATA(IIC0_SCL_MARK, FN_SEL_IIC0_0), PINMUX_DATA(IIC0_SDA_MARK, FN_SEL_IIC0_0),