| Message ID | 1441115432-12810-11-git-send-email-yamada.masahiro@socionext.com |
|---|---|
| State | Superseded |
| Delegated to: | Masahiro Yamada |
| Headers | show |
On 1 September 2015 at 07:50, Masahiro Yamada <yamada.masahiro@socionext.com> wrote: > Add "u-boot,dm-pre-reloc" for device nodes we want in SPL DTB > (spl/u-boot-spl.dtb). > > The "soc" node (this is simple-bus node) also needs the property > to bind the pinctrl node located under it. > > I am collecting this U-Boot specific hack to the bottom of board > DTS rather than inserting "u-boot,dm-pre-reloc" into SoC DTSI. > My goal is to sync DTSI with Linux for easier maintenance. > > Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> > --- > > arch/arm/dts/uniphier-ph1-ld4-ref.dts | 16 +++++++++++++++- > arch/arm/dts/uniphier-ph1-ld6b-ref.dts | 16 +++++++++++++++- > arch/arm/dts/uniphier-ph1-pro4-ref.dts | 16 +++++++++++++++- > arch/arm/dts/uniphier-ph1-sld8-ref.dts | 16 +++++++++++++++- > 4 files changed, 60 insertions(+), 4 deletions(-) Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/arm/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/dts/uniphier-ph1-ld4-ref.dts index 20f2e9a..9d697c1 100644 --- a/arch/arm/dts/uniphier-ph1-ld4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld4-ref.dts @@ -61,6 +61,20 @@ }; /* for U-boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + &serial0 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts index 58dc20e..ca68930 100644 --- a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts @@ -54,6 +54,20 @@ }; /* for U-boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + &serial0 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/dts/uniphier-ph1-pro4-ref.dts index ec1117d..a825069 100644 --- a/arch/arm/dts/uniphier-ph1-pro4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-pro4-ref.dts @@ -68,6 +68,20 @@ }; /* for U-boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + &serial0 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/dts/uniphier-ph1-sld8-ref.dts index 6269f9a..2cfcaff 100644 --- a/arch/arm/dts/uniphier-ph1-sld8-ref.dts +++ b/arch/arm/dts/uniphier-ph1-sld8-ref.dts @@ -65,6 +65,20 @@ }; /* for U-boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + &serial0 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; };
Add "u-boot,dm-pre-reloc" for device nodes we want in SPL DTB (spl/u-boot-spl.dtb). The "soc" node (this is simple-bus node) also needs the property to bind the pinctrl node located under it. I am collecting this U-Boot specific hack to the bottom of board DTS rather than inserting "u-boot,dm-pre-reloc" into SoC DTSI. My goal is to sync DTSI with Linux for easier maintenance. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> --- arch/arm/dts/uniphier-ph1-ld4-ref.dts | 16 +++++++++++++++- arch/arm/dts/uniphier-ph1-ld6b-ref.dts | 16 +++++++++++++++- arch/arm/dts/uniphier-ph1-pro4-ref.dts | 16 +++++++++++++++- arch/arm/dts/uniphier-ph1-sld8-ref.dts | 16 +++++++++++++++- 4 files changed, 60 insertions(+), 4 deletions(-)