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[Bug,1488363] Re: qemu 2.4.0 hangs using vfio for pci passthrough of graphics card

Message ID 516225151.15809363.1441092276689.JavaMail.zimbra@oxygem.tv
State New
Headers show

Commit Message

Alexandre DERUMIER Sept. 1, 2015, 7:24 a.m. UTC
Hi,

proxmox users report same bug here with qemu 2.4:

http://forum.proxmox.com/threads/23346-Proxmox-4b1-q35-machines-failing-to-reboot-problems-with-PCI-passthrough

we are going to test with reverting the commit to see if it's help.


----- Mail original -----
De: "Peter Maloney" <1488363@bugs.launchpad.net>
À: "qemu-devel" <qemu-devel@nongnu.org>
Envoyé: Mercredi 26 Août 2015 21:48:16
Objet: [Qemu-devel] [Bug 1488363] Re: qemu 2.4.0 hangs using vfio for pci passthrough of graphics card

I ran a bisect, and here's the result: 


b8eb5512fd8a115f164edbbe897cdf8884920ccb is the first bad commit 
commit b8eb5512fd8a115f164edbbe897cdf8884920ccb 
Author: Nadav Amit <namit@cs.technion.ac.il> 
Date: Mon Apr 13 02:32:08 2015 +0300 

target-i386: disable LINT0 after reset 

Due to old Seabios bug, QEMU reenable LINT0 after reset. This bug is long gone 
and therefore this hack is no longer needed. Since it violates the 
specifications, it is removed. 

Signed-off-by: Nadav Amit <namit@cs.technion.ac.il> 
Message-Id: <1428881529-29459-2-git-send-email-namit@cs.technion.ac.il> 
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> 

:040000 040000 a8ec76841b8d4e837c2cd0d0b82e08c0717a0ec6 
d33744231c98c9f588cefbc92f416183f639706f M hw 


$ git diff 7398dfc7799a50097803db4796c7edb6cd7d47a1 b8eb5512fd8a115f164edbbe897cdf8884920ccb 



And then to confirm it: 

git checkout v2.4.0 
git revert b8eb5512fd8a115f164edbbe897cdf8884920ccb 


And this build works. :)
diff mbox

Patch

diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c 
index 042e960..d38d24b 100644 
--- a/hw/intc/apic_common.c 
+++ b/hw/intc/apic_common.c 
@@ -243,15 +243,6 @@  static void apic_reset_common(DeviceState *dev) 
info->vapic_base_update(s); 

apic_init_reset(dev); 
- 
- if (bsp) { 
- /* 
- * LINT0 delivery mode on CPU #0 is set to ExtInt at initialization 
- * time typically by BIOS, so PIC interrupt can be delivered to the 
- * processor when local APIC is enabled. 
- */ 
- s->lvt[APIC_LVT_LINT0] = 0x700; 
- } 
} 

/* This function is only used for old state version 1 and 2 */