From patchwork Wed Apr 28 17:38:04 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 51198 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id ADCE7B7D2D for ; Thu, 29 Apr 2010 05:07:17 +1000 (EST) Received: from localhost ([127.0.0.1]:45671 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O7CbI-000108-Vx for incoming@patchwork.ozlabs.org; Wed, 28 Apr 2010 15:07:13 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1O7C1p-0000PQ-J9 for qemu-devel@nongnu.org; Wed, 28 Apr 2010 14:30:33 -0400 Received: from [140.186.70.92] (port=46681 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O7C1Z-0000HM-UM for qemu-devel@nongnu.org; Wed, 28 Apr 2010 14:30:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1O7C1R-0004Rj-Pq for qemu-devel@nongnu.org; Wed, 28 Apr 2010 14:30:17 -0400 Received: from are.twiddle.net ([75.149.56.221]:36481) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1O7C1R-0004Qc-C2 for qemu-devel@nongnu.org; Wed, 28 Apr 2010 14:30:09 -0400 Received: by are.twiddle.net (Postfix, from userid 5000) id 0BA0E106A; Wed, 28 Apr 2010 11:30:06 -0700 (PDT) Message-Id: <8246f4ed81a985ef138a9190a4f3df91a1eea478.1272479073.git.rth@twiddle.net> In-Reply-To: References: From: Richard Henderson Date: Wed, 28 Apr 2010 10:38:04 -0700 To: qemu-devel@nongnu.org X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 06/22] tcg-i386: Tidy shift operations. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Define OPC_SHIFT_{1,Ib,cl}. Factor opcode emission to a function. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c | 43 ++++++++++++++++++++++--------------------- 1 files changed, 22 insertions(+), 21 deletions(-) diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index 094b2da..c0133be 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -168,6 +168,9 @@ static inline int tcg_target_const_match(tcg_target_long val, #define OPC_MOVZWL (0xb7 | P_EXT) #define OPC_MOVSBL (0xbe | P_EXT) #define OPC_MOVSWL (0xbf | P_EXT) +#define OPC_SHIFT_1 (0xd1) +#define OPC_SHIFT_Ib (0xc1) +#define OPC_SHIFT_cl (0xd3) #define ARITH_ADD 0 #define ARITH_OR 1 @@ -294,6 +297,16 @@ static inline void tcg_out_st(TCGContext *s, TCGType type, int arg, tcg_out_modrm_offset(s, 0x89, arg, arg1, arg2); } +static void tcg_out_shifti(TCGContext *s, int subopc, int reg, int count) +{ + if (count == 1) { + tcg_out_modrm(s, OPC_SHIFT_1, subopc, reg); + } else { + tcg_out_modrm(s, OPC_SHIFT_Ib, subopc, reg); + tcg_out8(s, count); + } +} + static void tcg_out_ext8u(TCGContext *s, int dest, int src) { if (src >= 4) { @@ -314,12 +327,8 @@ static void tcg_out_ext8s(TCGContext *s, int dest, int src) if (src >= 4) { tcg_out_mov(s, dest, src); if (dest >= 4) { - /* shl $24, dest */ - tcg_out_modrm(s, 0xc1, SHIFT_SHL, dest); - tcg_out8(s, 24); - /* sar $24, dest */ - tcg_out_modrm(s, 0xc1, SHIFT_SAR, dest); - tcg_out8(s, 24); + tcg_out_shifti(s, SHIFT_SHL, dest, 24); + tcg_out_shifti(s, SHIFT_SAR, dest, 24); return; } src = dest; @@ -348,8 +357,7 @@ static inline void tcg_out_bswap32(TCGContext *s, int reg) static inline void tcg_out_rolw_8(TCGContext *s, int reg) { tcg_out8(s, 0x66); - tcg_out_modrm(s, 0xc1, 0, reg); - tcg_out8(s, 8); + tcg_out_shifti(s, SHIFT_ROL, reg, 8); } static inline void tgen_arithi(TCGContext *s, int c, int r0, int32_t val, int cf) @@ -644,9 +652,8 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, tcg_out_mov(s, r0, addr_reg); - tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */ - tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); - + tcg_out_shifti(s, SHIFT_SHR, r1, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); + tcg_out_modrm(s, 0x81, 4, r0); /* andl $x, r0 */ tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1)); @@ -842,9 +849,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, tcg_out_mov(s, r0, addr_reg); - tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */ - tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); - + tcg_out_shifti(s, SHIFT_SHR, r1, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); + tcg_out_modrm(s, 0x81, 4, r0); /* andl $x, r0 */ tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1)); @@ -1141,14 +1147,9 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, c = SHIFT_SHL; gen_shift32: if (const_args[2]) { - if (args[2] == 1) { - tcg_out_modrm(s, 0xd1, c, args[0]); - } else { - tcg_out_modrm(s, 0xc1, c, args[0]); - tcg_out8(s, args[2]); - } + tcg_out_shifti(s, c, args[0], args[2]); } else { - tcg_out_modrm(s, 0xd3, c, args[0]); + tcg_out_modrm(s, OPC_SHIFT_cl, c, args[0]); } break; case INDEX_op_shr_i32: