Patchwork [1/2] mtd/chips: add SST39WF160x NOR-flashes

login
register
mail settings
Submitter Wolfram Sang
Date April 27, 2010, 2:19 a.m.
Message ID <1272334774-17019-1-git-send-email-w.sang@pengutronix.de>
Download mbox | patch
Permalink /patch/51027/
State New
Headers show

Comments

Wolfram Sang - April 27, 2010, 2:19 a.m.
Due to a broken CFI, they have to be added to jedec_probe.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Cc: David Woodhouse <David.Woodhouse@intel.com>
---

Sadly, those two cannot be detected using Guillaume's SST-patchset.

 drivers/mtd/chips/jedec_probe.c |   30 ++++++++++++++++++++++++++++++
 1 files changed, 30 insertions(+), 0 deletions(-)
Artem Bityutskiy - May 4, 2010, 1:11 p.m.
On Tue, 2010-04-27 at 04:19 +0200, Wolfram Sang wrote:
> Due to a broken CFI, they have to be added to jedec_probe.
> 
> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
> Cc: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
> Cc: David Woodhouse <David.Woodhouse@intel.com>
> ---
> 
> Sadly, those two cannot be detected using Guillaume's SST-patchset.
> 
>  drivers/mtd/chips/jedec_probe.c |   30 ++++++++++++++++++++++++++++++
>  1 files changed, 30 insertions(+), 0 deletions(-)

Pushed both to my l2-mtd-2.6 / dunno
David Woodhouse - May 14, 2010, 12:44 a.m.
On Tue, 2010-04-27 at 04:19 +0200, Wolfram Sang wrote:
> Due to a broken CFI, they have to be added to jedec_probe.
> 
> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
> Cc: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
> Cc: David Woodhouse <David.Woodhouse@intel.com>
> ---
> 
> Sadly, those two cannot be detected using Guillaume's SST-patchset.

Why not? Guillaume has patches which add quirks for specific SST chips;
what is fundamentally different about these chips that means you can't
take the same approach?

>  drivers/mtd/chips/jedec_probe.c |   30 ++++++++++++++++++++++++++++++
>  1 files changed, 30 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c
> index 8db1148..6850b23 100644
> --- a/drivers/mtd/chips/jedec_probe.c
> +++ b/drivers/mtd/chips/jedec_probe.c
> @@ -166,6 +166,8 @@
>  #define SST39LF160	0x2782
>  #define SST39VF1601	0x234b
>  #define SST39VF3201	0x235b
> +#define SST39WF1601	0x274b
> +#define SST39WF1602	0x274a
>  #define SST39LF512	0x00D4
>  #define SST39LF010	0x00D5
>  #define SST39LF020	0x00D6
> @@ -1529,6 +1531,34 @@ static const struct amd_flash_info jedec_table[] = {
>  			ERASEINFO(0x1000,256)
>  		}
>  	}, {
> +		/* CFI is broken: reports AMD_STD, but needs custom uaddr */
> +		.mfr_id		= MANUFACTURER_SST,
> +		.dev_id		= SST39WF1601,
> +		.name		= "SST 39WF1601",
> +		.devtypes	= CFI_DEVICETYPE_X16,
> +		.uaddr		= MTD_UADDR_0xAAAA_0x5555,
> +		.dev_size	= SIZE_2MiB,
> +		.cmd_set	= P_ID_AMD_STD,
> +		.nr_regions	= 2,
> +		.regions	= {
> +			ERASEINFO(0x1000,256),
> +			ERASEINFO(0x1000,256)
> +		}
> +	}, {
> +		/* CFI is broken: reports AMD_STD, but needs custom uaddr */
> +		.mfr_id		= MANUFACTURER_SST,
> +		.dev_id		= SST39WF1602,
> +		.name		= "SST 39WF1602",
> +		.devtypes	= CFI_DEVICETYPE_X16,
> +		.uaddr		= MTD_UADDR_0xAAAA_0x5555,
> +		.dev_size	= SIZE_2MiB,
> +		.cmd_set	= P_ID_AMD_STD,
> +		.nr_regions	= 2,
> +		.regions	= {
> +			ERASEINFO(0x1000,256),
> +			ERASEINFO(0x1000,256)
> +		}
> +	}, {
>  		.mfr_id		= MANUFACTURER_SST,     /* should be CFI */
>  		.dev_id		= SST39VF3201,
>  		.name		= "SST 39VF3201",
Wolfram Sang - May 14, 2010, 1:20 a.m.
On Fri, May 14, 2010 at 01:44:48AM +0100, David Woodhouse wrote:
> On Tue, 2010-04-27 at 04:19 +0200, Wolfram Sang wrote:
> > Due to a broken CFI, they have to be added to jedec_probe.
> > 
> > Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
> > Cc: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
> > Cc: David Woodhouse <David.Woodhouse@intel.com>
> > ---
> > 
> > Sadly, those two cannot be detected using Guillaume's SST-patchset.
> 
> Why not? Guillaume has patches which add quirks for specific SST chips;
> what is fundamentally different about these chips that means you can't
> take the same approach?

See his patch 3/8. He introduces:

+#define P_ID_SST_OLD            0x0701

so, he can then do:

+       if (cfi->cfiq->P_ID == P_ID_SST_OLD) {
+               addr_unlock1 = 0x5555;
+               addr_unlock2 = 0x2AAA;
+       }
+

Only after that, he can query for more CFI-information/product ID and apply the
quirks.

My flashes don't have P_ID_SST_OLD, sadly, but P_ID_AMD_STD. Still, unlike
other AMD_STD-flashes, my flashes need their custom unlock address. I couldn't
find a way to distinguish this from the standard case with the regular unlock
addresses.

Kind regards,

   Wolfram
David Woodhouse - May 14, 2010, 1:28 a.m.
On Fri, 2010-05-14 at 03:20 +0200, Wolfram Sang wrote:
> My flashes don't have P_ID_SST_OLD, sadly, but P_ID_AMD_STD. Still, unlike
> other AMD_STD-flashes, my flashes need their custom unlock address. I couldn't
> find a way to distinguish this from the standard case with the regular unlock
> addresses. 

Makes sense; thanks for the clarification.

Patch

diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c
index 8db1148..6850b23 100644
--- a/drivers/mtd/chips/jedec_probe.c
+++ b/drivers/mtd/chips/jedec_probe.c
@@ -166,6 +166,8 @@ 
 #define SST39LF160	0x2782
 #define SST39VF1601	0x234b
 #define SST39VF3201	0x235b
+#define SST39WF1601	0x274b
+#define SST39WF1602	0x274a
 #define SST39LF512	0x00D4
 #define SST39LF010	0x00D5
 #define SST39LF020	0x00D6
@@ -1529,6 +1531,34 @@  static const struct amd_flash_info jedec_table[] = {
 			ERASEINFO(0x1000,256)
 		}
 	}, {
+		/* CFI is broken: reports AMD_STD, but needs custom uaddr */
+		.mfr_id		= MANUFACTURER_SST,
+		.dev_id		= SST39WF1601,
+		.name		= "SST 39WF1601",
+		.devtypes	= CFI_DEVICETYPE_X16,
+		.uaddr		= MTD_UADDR_0xAAAA_0x5555,
+		.dev_size	= SIZE_2MiB,
+		.cmd_set	= P_ID_AMD_STD,
+		.nr_regions	= 2,
+		.regions	= {
+			ERASEINFO(0x1000,256),
+			ERASEINFO(0x1000,256)
+		}
+	}, {
+		/* CFI is broken: reports AMD_STD, but needs custom uaddr */
+		.mfr_id		= MANUFACTURER_SST,
+		.dev_id		= SST39WF1602,
+		.name		= "SST 39WF1602",
+		.devtypes	= CFI_DEVICETYPE_X16,
+		.uaddr		= MTD_UADDR_0xAAAA_0x5555,
+		.dev_size	= SIZE_2MiB,
+		.cmd_set	= P_ID_AMD_STD,
+		.nr_regions	= 2,
+		.regions	= {
+			ERASEINFO(0x1000,256),
+			ERASEINFO(0x1000,256)
+		}
+	}, {
 		.mfr_id		= MANUFACTURER_SST,     /* should be CFI */
 		.dev_id		= SST39VF3201,
 		.name		= "SST 39VF3201",