| Message ID | 1440375847-17603-19-git-send-email-cota@braap.org |
|---|---|
| State | New |
| Headers | show |
Emilio G. Cota <cota@braap.org> writes: > Signed-off-by: Emilio G. Cota <cota@braap.org> > --- > tcg/tcg-op.c | 5 +++++ > tcg/tcg-op.h | 18 ++++++++++++++++++ > tcg/tcg-opc.h | 5 +++++ > 3 files changed, 28 insertions(+) > > diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c > index 45098c3..6d5b1df 100644 > --- a/tcg/tcg-op.c > +++ b/tcg/tcg-op.c > @@ -57,6 +57,11 @@ static void tcg_emit_op(TCGContext *ctx, TCGOpcode opc, int args) > }; > } > > +void tcg_gen_op0(TCGContext *ctx, TCGOpcode opc) > +{ > + tcg_emit_op(ctx, opc, -1); Is that -1 always safe? I'm finding the guts of the TCG opbuf a little hard to follow but you see code like this: TCGOp * const op = &s->gen_op_buf[oi]; TCGArg * const args = &s->gen_opparam_buf[op->args]; and wonder how badly that could go wrong. > +} > + > void tcg_gen_op1(TCGContext *ctx, TCGOpcode opc, TCGArg a1) > { > int pi = ctx->gen_next_parm_idx; > diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h > index d1d763f..52482c0 100644 > --- a/tcg/tcg-op.h > +++ b/tcg/tcg-op.h > @@ -28,6 +28,7 @@ > > /* Basic output routines. Not for general consumption. */ > > +void tcg_gen_op0(TCGContext *, TCGOpcode); > void tcg_gen_op1(TCGContext *, TCGOpcode, TCGArg); > void tcg_gen_op2(TCGContext *, TCGOpcode, TCGArg, TCGArg); > void tcg_gen_op3(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg); > @@ -698,6 +699,23 @@ static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg) > tcg_gen_trunc_shr_i64_i32(ret, arg, 0); > } > > +/* fences */ > + > +static inline void tcg_gen_fence_load(void) > +{ > + tcg_gen_op0(&tcg_ctx, INDEX_op_fence_load); > +} > + > +static inline void tcg_gen_fence_store(void) > +{ > + tcg_gen_op0(&tcg_ctx, INDEX_op_fence_store); > +} > + > +static inline void tcg_gen_fence_full(void) > +{ > + tcg_gen_op0(&tcg_ctx, INDEX_op_fence_full); > +} > + > /* QEMU specific operations. */ > > #ifndef TARGET_LONG_BITS > diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h > index 13ccb60..85de953 100644 > --- a/tcg/tcg-opc.h > +++ b/tcg/tcg-opc.h > @@ -167,6 +167,11 @@ DEF(muls2_i64, 2, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_muls2_i64)) > DEF(muluh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_muluh_i64)) > DEF(mulsh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_mulsh_i64)) > > +/* fences */ > +DEF(fence_load, 0, 0, 0, 0) > +DEF(fence_store, 0, 0, 0, 0) > +DEF(fence_full, 0, 0, 0, 0) > + > /* QEMU specific */ > #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS > DEF(debug_insn_start, 0, 0, 2, TCG_OPF_NOT_PRESENT)
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 45098c3..6d5b1df 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -57,6 +57,11 @@ static void tcg_emit_op(TCGContext *ctx, TCGOpcode opc, int args) }; } +void tcg_gen_op0(TCGContext *ctx, TCGOpcode opc) +{ + tcg_emit_op(ctx, opc, -1); +} + void tcg_gen_op1(TCGContext *ctx, TCGOpcode opc, TCGArg a1) { int pi = ctx->gen_next_parm_idx; diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index d1d763f..52482c0 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -28,6 +28,7 @@ /* Basic output routines. Not for general consumption. */ +void tcg_gen_op0(TCGContext *, TCGOpcode); void tcg_gen_op1(TCGContext *, TCGOpcode, TCGArg); void tcg_gen_op2(TCGContext *, TCGOpcode, TCGArg, TCGArg); void tcg_gen_op3(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg); @@ -698,6 +699,23 @@ static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg) tcg_gen_trunc_shr_i64_i32(ret, arg, 0); } +/* fences */ + +static inline void tcg_gen_fence_load(void) +{ + tcg_gen_op0(&tcg_ctx, INDEX_op_fence_load); +} + +static inline void tcg_gen_fence_store(void) +{ + tcg_gen_op0(&tcg_ctx, INDEX_op_fence_store); +} + +static inline void tcg_gen_fence_full(void) +{ + tcg_gen_op0(&tcg_ctx, INDEX_op_fence_full); +} + /* QEMU specific operations. */ #ifndef TARGET_LONG_BITS diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index 13ccb60..85de953 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -167,6 +167,11 @@ DEF(muls2_i64, 2, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_muls2_i64)) DEF(muluh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_muluh_i64)) DEF(mulsh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_mulsh_i64)) +/* fences */ +DEF(fence_load, 0, 0, 0, 0) +DEF(fence_store, 0, 0, 0, 0) +DEF(fence_full, 0, 0, 0, 0) + /* QEMU specific */ #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS DEF(debug_insn_start, 0, 0, 2, TCG_OPF_NOT_PRESENT)
Signed-off-by: Emilio G. Cota <cota@braap.org> --- tcg/tcg-op.c | 5 +++++ tcg/tcg-op.h | 18 ++++++++++++++++++ tcg/tcg-opc.h | 5 +++++ 3 files changed, 28 insertions(+)