diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index b54c520..5162b87 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -81,6 +81,7 @@ typedef struct DisasContext {
     int address_mask_32bit;
     uint32_t cc_op;  /* current CC operation */
     struct TranslationBlock *tb;
+    CPUState *env;
     sparc_def_t *def;
 } DisasContext;
 
@@ -234,7 +235,8 @@ static inline void gen_goto_tb(DisasContext *s, int tb_num,
 
     tb = s->tb;
     if ((pc & TARGET_PAGE_MASK) == (tb->pc & TARGET_PAGE_MASK) &&
-        (npc & TARGET_PAGE_MASK) == (tb->pc & TARGET_PAGE_MASK))  {
+        (npc & TARGET_PAGE_MASK) == (tb->pc & TARGET_PAGE_MASK) &&
+        !(s->env->singlestep_enabled || singlestep))  {
         /* jump to same page: we can use a direct jump */
         tcg_gen_goto_tb(tb_num);
         tcg_gen_movi_tl(cpu_pc, pc);
@@ -4680,6 +4682,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
 
     memset(dc, 0, sizeof(DisasContext));
     dc->tb = tb;
+    dc->env = env;
     pc_start = tb->pc;
     dc->pc = pc_start;
     last_pc = dc->pc;
@@ -4755,8 +4758,6 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
         /* if single step mode, we generate only one instruction and
            generate an exception */
         if (env->singlestep_enabled || singlestep) {
-            tcg_gen_movi_tl(cpu_pc, dc->pc);
-            tcg_gen_exit_tb(0);
             break;
         }
     } while ((gen_opc_ptr < gen_opc_end) &&