diff mbox

[U-Boot,v2,07/12] x86: fsp: Call fsp_init_phase_pci() in pci_uclass_post_probe()

Message ID 1440078028-29464-8-git-send-email-bmeng.cn@gmail.com
State Accepted
Delegated to: Simon Glass
Headers show

Commit Message

Bin Meng Aug. 20, 2015, 1:40 p.m. UTC
Per Intel FSP specification, we should call FSP notify API to
inform FSP that PCI enumeration has been done so that FSP will
do any necessary initialization as required by the chipset's
BIOS Writer's Guide (BWG).

Unfortunately we have to put this call here as with driver model,
the enumeration is all done on a lazy basis as needed, so until
something is touched on PCI it won't happen.

Note we only call this after U-Boot is relocated and root bus has
finished probing.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

Changes in v2: None

 drivers/pci/pci-uclass.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

Comments

Simon Glass Aug. 21, 2015, 11:27 p.m. UTC | #1
Hi Bin,

On 20 August 2015 at 07:40, Bin Meng <bmeng.cn@gmail.com> wrote:
> Per Intel FSP specification, we should call FSP notify API to
> inform FSP that PCI enumeration has been done so that FSP will
> do any necessary initialization as required by the chipset's
> BIOS Writer's Guide (BWG).
>
> Unfortunately we have to put this call here as with driver model,
> the enumeration is all done on a lazy basis as needed, so until
> something is touched on PCI it won't happen.
>
> Note we only call this after U-Boot is relocated and root bus has
> finished probing.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
> Changes in v2: None
>
>  drivers/pci/pci-uclass.c | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
>

Acked-by: Simon Glass <sjg@chromium.org>

Please see below.

> diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
> index 4160274..c90e7ac 100644
> --- a/drivers/pci/pci-uclass.c
> +++ b/drivers/pci/pci-uclass.c
> @@ -14,6 +14,9 @@
>  #include <dm/lists.h>
>  #include <dm/root.h>
>  #include <dm/device-internal.h>
> +#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)

Do we need CONFIG_X86 here? Do you think it is better to have it to be clearer?

> +#include <asm/fsp/fsp_support.h>
> +#endif
>
>  DECLARE_GLOBAL_DATA_PTR;
>
> @@ -749,6 +752,24 @@ static int pci_uclass_post_probe(struct udevice *bus)
>         ret = pci_auto_config_devices(bus);
>  #endif
>
> +#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
> +       /*
> +        * Per Intel FSP specification, we should call FSP notify API to
> +        * inform FSP that PCI enumeration has been done so that FSP will
> +        * do any necessary initialization as required by the chipset's
> +        * BIOS Writer's Guide (BWG).
> +        *
> +        * Unfortunately we have to put this call here as with driver model,
> +        * the enumeration is all done on a lazy basis as needed, so until
> +        * something is touched on PCI it won't happen.
> +        *
> +        * Note we only call this 1) after U-Boot is relocated, and 2)
> +        * root bus has finished probing.
> +        */
> +       if ((gd->flags & GD_FLG_RELOC) && (bus->seq == 0))
> +               ret = fsp_init_phase_pci();
> +#endif
> +
>         return ret < 0 ? ret : 0;
>  }
>
> --
> 1.8.2.1
>

Regards,
Simon
Bin Meng Aug. 22, 2015, 9:05 a.m. UTC | #2
Hi Simon,

On Sat, Aug 22, 2015 at 7:27 AM, Simon Glass <sjg@chromium.org> wrote:
> Hi Bin,
>
> On 20 August 2015 at 07:40, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Per Intel FSP specification, we should call FSP notify API to
>> inform FSP that PCI enumeration has been done so that FSP will
>> do any necessary initialization as required by the chipset's
>> BIOS Writer's Guide (BWG).
>>
>> Unfortunately we have to put this call here as with driver model,
>> the enumeration is all done on a lazy basis as needed, so until
>> something is touched on PCI it won't happen.
>>
>> Note we only call this after U-Boot is relocated and root bus has
>> finished probing.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>> Changes in v2: None
>>
>>  drivers/pci/pci-uclass.c | 21 +++++++++++++++++++++
>>  1 file changed, 21 insertions(+)
>>
>
> Acked-by: Simon Glass <sjg@chromium.org>
>
> Please see below.
>
>> diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
>> index 4160274..c90e7ac 100644
>> --- a/drivers/pci/pci-uclass.c
>> +++ b/drivers/pci/pci-uclass.c
>> @@ -14,6 +14,9 @@
>>  #include <dm/lists.h>
>>  #include <dm/root.h>
>>  #include <dm/device-internal.h>
>> +#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
>
> Do we need CONFIG_X86 here? Do you think it is better to have it to be clearer?

Technically it is not needed as CONFIG_HAVE_FSP is dependent on
CONFIG_X86 which is defined by Kconfig dependency. However I
intentionally put it here, as I thought this is a common driver code
for all architectures, and someone who is not familiar with x86 may
wonder what CONFIG_HAVE_FSP is, so I put CONFIG_X86 at first to
indicate this is x86-specific thing. What do you think?

>
>> +#include <asm/fsp/fsp_support.h>
>> +#endif
>>
>>  DECLARE_GLOBAL_DATA_PTR;
>>
>> @@ -749,6 +752,24 @@ static int pci_uclass_post_probe(struct udevice *bus)
>>         ret = pci_auto_config_devices(bus);
>>  #endif
>>
>> +#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
>> +       /*
>> +        * Per Intel FSP specification, we should call FSP notify API to
>> +        * inform FSP that PCI enumeration has been done so that FSP will
>> +        * do any necessary initialization as required by the chipset's
>> +        * BIOS Writer's Guide (BWG).
>> +        *
>> +        * Unfortunately we have to put this call here as with driver model,
>> +        * the enumeration is all done on a lazy basis as needed, so until
>> +        * something is touched on PCI it won't happen.
>> +        *
>> +        * Note we only call this 1) after U-Boot is relocated, and 2)
>> +        * root bus has finished probing.
>> +        */
>> +       if ((gd->flags & GD_FLG_RELOC) && (bus->seq == 0))
>> +               ret = fsp_init_phase_pci();
>> +#endif
>> +
>>         return ret < 0 ? ret : 0;
>>  }
>>
>> --

Regards,
Bin
Simon Glass Aug. 23, 2015, 9:21 p.m. UTC | #3
Hi Bin,

On 22 August 2015 at 03:05, Bin Meng <bmeng.cn@gmail.com> wrote:
> Hi Simon,
>
> On Sat, Aug 22, 2015 at 7:27 AM, Simon Glass <sjg@chromium.org> wrote:
>> Hi Bin,
>>
>> On 20 August 2015 at 07:40, Bin Meng <bmeng.cn@gmail.com> wrote:
>>> Per Intel FSP specification, we should call FSP notify API to
>>> inform FSP that PCI enumeration has been done so that FSP will
>>> do any necessary initialization as required by the chipset's
>>> BIOS Writer's Guide (BWG).
>>>
>>> Unfortunately we have to put this call here as with driver model,
>>> the enumeration is all done on a lazy basis as needed, so until
>>> something is touched on PCI it won't happen.
>>>
>>> Note we only call this after U-Boot is relocated and root bus has
>>> finished probing.
>>>
>>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>> ---
>>>
>>> Changes in v2: None
>>>
>>>  drivers/pci/pci-uclass.c | 21 +++++++++++++++++++++
>>>  1 file changed, 21 insertions(+)
>>>
>>
>> Acked-by: Simon Glass <sjg@chromium.org>
>>
>> Please see below.
>>
>>> diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
>>> index 4160274..c90e7ac 100644
>>> --- a/drivers/pci/pci-uclass.c
>>> +++ b/drivers/pci/pci-uclass.c
>>> @@ -14,6 +14,9 @@
>>>  #include <dm/lists.h>
>>>  #include <dm/root.h>
>>>  #include <dm/device-internal.h>
>>> +#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
>>
>> Do we need CONFIG_X86 here? Do you think it is better to have it to be clearer?
>
> Technically it is not needed as CONFIG_HAVE_FSP is dependent on
> CONFIG_X86 which is defined by Kconfig dependency. However I
> intentionally put it here, as I thought this is a common driver code
> for all architectures, and someone who is not familiar with x86 may
> wonder what CONFIG_HAVE_FSP is, so I put CONFIG_X86 at first to
> indicate this is x86-specific thing. What do you think?

Yes I thought that might be it. I agree.

Applied to u-boot-x86, thanks!

[snip]

Regards,
Simon
diff mbox

Patch

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 4160274..c90e7ac 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -14,6 +14,9 @@ 
 #include <dm/lists.h>
 #include <dm/root.h>
 #include <dm/device-internal.h>
+#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
+#include <asm/fsp/fsp_support.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -749,6 +752,24 @@  static int pci_uclass_post_probe(struct udevice *bus)
 	ret = pci_auto_config_devices(bus);
 #endif
 
+#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
+	/*
+	 * Per Intel FSP specification, we should call FSP notify API to
+	 * inform FSP that PCI enumeration has been done so that FSP will
+	 * do any necessary initialization as required by the chipset's
+	 * BIOS Writer's Guide (BWG).
+	 *
+	 * Unfortunately we have to put this call here as with driver model,
+	 * the enumeration is all done on a lazy basis as needed, so until
+	 * something is touched on PCI it won't happen.
+	 *
+	 * Note we only call this 1) after U-Boot is relocated, and 2)
+	 * root bus has finished probing.
+	 */
+	if ((gd->flags & GD_FLG_RELOC) && (bus->seq == 0))
+		ret = fsp_init_phase_pci();
+#endif
+
 	return ret < 0 ? ret : 0;
 }