| Message ID | 1439450957-23197-10-git-send-email-bmeng.cn@gmail.com |
|---|---|
| State | Accepted |
| Delegated to: | Simon Glass |
| Headers | show |
On 13 August 2015 at 01:29, Bin Meng <bmeng.cn@gmail.com> wrote: > It looks that x86 chipset always contains a host bridge at pci > b.d.f 0.0.0, so enable this for all boards. > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> > --- > > include/configs/bayleybay.h | 1 - > include/configs/crownbay.h | 1 - > include/configs/minnowmax.h | 1 - > include/configs/qemu-x86.h | 1 - > include/configs/x86-common.h | 1 + > 5 files changed, 1 insertion(+), 4 deletions(-) Acked-by: Simon Glass <sjg@chromium.org>
On 16 August 2015 at 15:27, Simon Glass <sjg@chromium.org> wrote: > On 13 August 2015 at 01:29, Bin Meng <bmeng.cn@gmail.com> wrote: >> It looks that x86 chipset always contains a host bridge at pci >> b.d.f 0.0.0, so enable this for all boards. >> >> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> >> --- >> >> include/configs/bayleybay.h | 1 - >> include/configs/crownbay.h | 1 - >> include/configs/minnowmax.h | 1 - >> include/configs/qemu-x86.h | 1 - >> include/configs/x86-common.h | 1 + >> 5 files changed, 1 insertion(+), 4 deletions(-) > > Acked-by: Simon Glass <sjg@chromium.org> Applied to u-boot-x86, thanks!
diff --git a/include/configs/bayleybay.h b/include/configs/bayleybay.h index c590f56..eae94df 100644 --- a/include/configs/bayleybay.h +++ b/include/configs/bayleybay.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_ARCH_MISC_INIT -#define CONFIG_PCI_CONFIG_HOST_BRIDGE #define CONFIG_SYS_EARLY_PCI_INIT #define CONFIG_PCI_PNP #define CONFIG_E1000 diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index 1ea320b..e87bd54 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -31,7 +31,6 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0xe000 -#define CONFIG_PCI_CONFIG_HOST_BRIDGE #define CONFIG_SYS_EARLY_PCI_INIT #define CONFIG_PCI_PNP #define CONFIG_E1000 diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 64fa676..38879da 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -18,7 +18,6 @@ #define CONFIG_SMSC_LPC47M -#define CONFIG_PCI_CONFIG_HOST_BRIDGE #define CONFIG_SYS_EARLY_PCI_INIT #define CONFIG_PCI_PNP #define CONFIG_RTL8169 diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index c25e331..e589425 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -28,7 +28,6 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0xe000 -#define CONFIG_PCI_CONFIG_HOST_BRIDGE #define CONFIG_PCI_PNP #define CONFIG_E1000 diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 3d07cc0..217312e 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -192,6 +192,7 @@ * PCI configuration */ #define CONFIG_PCI +#define CONFIG_PCI_CONFIG_HOST_BRIDGE /*----------------------------------------------------------------------- * USB configuration
It looks that x86 chipset always contains a host bridge at pci b.d.f 0.0.0, so enable this for all boards. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> --- include/configs/bayleybay.h | 1 - include/configs/crownbay.h | 1 - include/configs/minnowmax.h | 1 - include/configs/qemu-x86.h | 1 - include/configs/x86-common.h | 1 + 5 files changed, 1 insertion(+), 4 deletions(-)